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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMP93CS32F датащи(PDF) 112 Page - Toshiba Semiconductor |
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TMP93CS32F датащи(HTML) 112 Page - Toshiba Semiconductor |
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112 / 180 page  TMP93CS32 2004-02-10 93CS32-110 Serial Channel 0 Control Register 7 6 5 4 3 2 1 0 Bit symbol RB8 EVEN PE OERR PERR FERR SCLKS IOC SC0CR (0051H) Read/Write R R/W R (cleared to Zero when read) R/W After reset Undefined 0 0 0 0 0 0 0 1: Error Function Received data bit8 Parity 0: Odd 1: Even Parity addition 0: Disable 1: Enable Overrun Parity Framing 0: SCLK0 1: SCLK0 0: Baud rate generator 0 1: SCLK0 pin input Select I/O interface input clock 0 Baud rate generater 0 (Note 1) 1 SCLK0 pin input Edge selection in SCLK0 pin input mode 0 Transmits and receives data at rise edge of SCLK0 1 Transmits and receives data at fall edge of SCLK0 Framing error flag Parity error flag Overrun error flag Cleared to Zero when read. (Note 2) Enable parity addition 0 Disable 1 Enable Addition/check of even parity 0 Odd parity 1 Even parity Receving data bit8 8-bit UART mode (parity) Stores received parity bit 9-bit UART mode Stores received data bit8 Note 1: To use baud rate generator, set TRUN<PRRUN> to “1”, putting the prescaler in RUN mode. Note 2: As all error flags are cleared after reading, do not test only a single bit with a bit-testing instruction. Figure 3.9.3 Serial Channel 0 Related Register (2/7) |
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