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PM7366-PI датащи(PDF) 144 Page - PMC-Sierra, Inc |
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PM7366-PI датащи(HTML) 144 Page - PMC-Sierra, Inc |
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144 / 286 page ![]() RELEASED PM7366 FREEDM-8 DATA SHEET PMC-1970930 ISSUE 4 FRAME ENGINE AND DATA LINK MANAGER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 131 Register 0x280 : RMAC Control Bit Type Function Default Bit 31 to Bit 16 Unused XXXXH Bit 15 Unused X Bit 14 Unused X Bit 13 Unused X Bit 12 Unused X Bit 11 R/W RPQ_SFN[1] 0 Bit 10 R/W RPQ_SFN[0] 0 Bit 9 R/W RPQ_LFN[1] 0 Bit 8 R/W RPQ_LFN[0] 0 Bit 7 R/W RPQ_RDYN[2] 0 Bit 6 R/W RPQ_RDYN[1] 0 Bit 5 R/W RPQ_RDYN[0] 0 Bit 4 R/W RAWMAX[1] 1 Bit 3 R/W RAWMAX[0] 1 Bit 2 R/W SCACHE 1 Bit 1 R/W LCACHE 1 Bit 0 R/W ENABLE 0 This register configures the RMAC block. Note This register is not byte addressable. Writing to this register modifies all the bits in the register. Byte selection using byte enable signals (CBEB[3:0]) are not implemented. However, when all four byte enables are negated, no access is made to this register. ENABLE: The ENABLE bit determines whether or not the RMAC accepts data from the RHDL block and sends it to host memory. When set to 1, these tasks are enabled. When set to 0, they are disabled. |
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