PM7366-PI datasheet(143/286 Pages) PMC

143 / 286 page

RELEASED

PM7366 FREEDM-8

DATA SHEET

PMC-1970930

ISSUE 4

FRAME ENGINE AND DATA LINK MANAGER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

130

Bit

Type

Function

Default

Bit 31 to

Bit 16

Unused

XXXXH

Bit 15

R/W

MAX[15]

Bit 14

R/W

MAX[14]

Bit 13

R/W

MAX[13]

Bit 12

R/W

MAX[12]

Bit 11

R/W

MAX[11]

Bit 10

R/W

MAX[10]

Bit 9

R/W

MAX[9]

Bit 8

R/W

MAX[8]

Bit 7

R/W

MAX[7]

Bit 6

R/W

MAX[6]

Bit 5

R/W

MAX[5]

Bit 4

R/W

MAX[4]

Bit 3

R/W

MAX[3]

Bit 2

R/W

MAX[2]

Bit 1

R/W

MAX[1]

Bit 0

R/W

MAX[0]

This register configures the maximum legal HDLC packet byte length.

Note

This register is not byte addressable. Writing to this register modifies all the bits in the register.

Byte selection using byte enable signals (CBEB[3:0]) are not implemented. However, when all

four byte enables are negated, no access is made to this register.

MAX[15:0]:

The maximum HDLC packet length (MAX[15:0]) configures the FREEDM-8 to reject HDLC

packets longer than a maximum size when LENCHK is set high. Receive packets with total

length, including address, control, information and FCS fields, greater than MAX[15:0] bytes

are aborted. When LENCHK is set low, aborts are not generated regardless of packet length

and MAX[15:0] must be set to 'hFFFF.

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