PM7366-PI datasheet(142/286 Pages) PMC

номер детали	PM7366-PI

подробное описание детали	FRAME ENGINE AND DATA LINK MANAGER

PDF	286 Pages

Scroll/Zoom	100%

производитель	PMC [PMC-Sierra, Inc]

домашняя страница	http://www.pmc-sierra.com

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142 / 286 page

RELEASED

PM7366 FREEDM-8

DATA SHEET

PMC-1970930

ISSUE 4

FRAME ENGINE AND DATA LINK MANAGER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

129

TSTD:

The telecom standard bit (TSTD) controls the bit ordering of the HDLC data transferred to the

PCI host. When TSTD is set low, the least significant bit of the each byte on the PCI bus

(AD[0], AD[8], AD[16] and AD[24]) is the first HDLC bit received and the most significant bit of

each byte (AD[7], AD[15], AD[23] and AD[31]) is the last HDLC bit received (datacom

standard). When TSTD is set high, AD[0], AD[8], AD[16] and AD[24] are the last HDLC bit

received and AD[7], AD[15], AD[23] and AD[31] are the first HDLC bit received (telecom

standard).

LENCHK:

The packet length error check bit (LENCHK) controls the checking of receive packets that are

longer than the maximum programmed length. When LENCHK is set high, receive packets

are aborted and the remainder of the frame discarded when the packet exceeds the

maximum packet length given by MAX[15:0]. When LENCHK is set low, receive packets are

not checked for maximum size and MAX[15:0] must be set to 'hFFFF.

PM7366-PI датащи(PDF) 142 Page - PMC-Sierra, Inc