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PM7366-PI датащи(PDF) 106 Page - PMC-Sierra, Inc

номер детали PM7366-PI
подробное описание детали  FRAME ENGINE AND DATA LINK MANAGER
PDF  286 Pages
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производитель  PMC [PMC-Sierra, Inc]
домашняя страница  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM7366-PI датащи(HTML) 106 Page - PMC-Sierra, Inc

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RELEASED
PM7366 FREEDM-8
DATA SHEET
PMC-1970930
ISSUE 4
FRAME ENGINE AND DATA LINK MANAGER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
93
Register 0x020 : FREEDM-8 Master BERT Control
Bit
Type
Function
Default
Bit 31 to
Bit 16
Unused
XXXXH
Bit 15
R/W
TBEN
0
Bit 14
Unused
X
Bit 13
Unused
X
Bit 12
R/W
Reserved[3]
0
Bit 11
R/W
Reserved[2]
0
Bit 10
R/W
TBSEL[2]
0
Bit 9
R/W
TBSEL[1]
0
Bit 8
R/W
TBSEL[0]
0
Bit 7
R/W
RBEN
0
Bit 6
Unused
X
Bit 5
Unused
X
Bit 4
R/W
Reserved[1]
0
Bit 3
R/W
Reserved[0]
0
Bit 2
R/W
RBSEL[2]
0
Bit 1
R/W
RBSEL[1]
0
Bit 0
R/W
RBSEL[0]
0
This register controls the bit error rate testing of the receive and transmit links.
Note
This register is not byte addressable. Writing to this register modifies all the bits in the register.
Byte selection using byte enable signals (CBEB[3:0]) are not implemented. However, when all
four byte enables are negated, no access is made to this register.
RBSEL[2:0]:
The receive bit error rates testing link select bits (RBSEL[2:0]) controls the source of data on
the RBD and RBCLK outputs when receive bit error rate testing is enabled (RBEN set high).
RBSEL[2:0] is a binary number that selects a receive link (RD[7:0]/RCLK[7:0]) to be the
source of data for RBD and RBCLK outputs. RBSEL[2:0] is ignored when RBEN is set low.



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