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PM7366-PI датащи(PDF) 104 Page - PMC-Sierra, Inc

номер детали PM7366-PI
подробное описание детали  FRAME ENGINE AND DATA LINK MANAGER
PDF  286 Pages
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производитель  PMC [PMC-Sierra, Inc]
домашняя страница  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM7366-PI датащи(HTML) 104 Page - PMC-Sierra, Inc

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RELEASED
PM7366 FREEDM-8
DATA SHEET
PMC-1970930
ISSUE 4
FRAME ENGINE AND DATA LINK MANAGER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
91
Register 0x014 : FREEDM-8 Master Line Loopback
Bit
Type
Function
Default
Bit 31 to
Bit 16
Unused
XXXXH
Bit 15
R/W
Reserved[7]
0
Bit 14
R/W
Reserved[6]
0
Bit 13
R/W
Reserved[5]
0
Bit 12
R/W
Reserved[4]
0
Bit 11
R/W
Reserved[3]
0
Bit 10
R/W
Reserved[2]
0
Bit 9
R/W
Reserved[1]
0
Bit 8
R/W
Reserved[0]
0
Bit 7
R/W
LLBEN[7]
0
Bit 6
R/W
LLBEN[6]
0
Bit 5
R/W
LLBEN[5]
0
Bit 4
R/W
LLBEN[4]
0
Bit 3
R/W
LLBEN[3]
0
Bit 2
R/W
LLBEN[2]
0
Bit 1
R/W
LLBEN[1]
0
Bit 0
R/W
LLBEN[0]
0
This register controls line loopback for links #0 to #7.
Note
This register is not byte addressable. Writing to this register modifies all the bits in the register.
Byte selection using byte enable signals (CBEB[3:0]) are not implemented. However, when all
four byte enables are negated, no access is made to this register.
LLBEN[7:0]:
The line loopback enable bits (LLBEN[7:0]) controls line loopback for links #7 to #0. When
LLBEN[n] is set high, the data on RD[n] is passed verbatim to TD[n] which is then updated on
the falling edge of RCLK[n]. TCLK[n] is ignored. When LLBEN[n] is set low, TD[n] is
processed normally.



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