AM62A7 datasheet(103/238 Pages) TI1

103 / 238 page

Table 7-11. RESET_REQz Timing Requirements

see Figure 7-10

NO.

PARAMETER

MIN

MAX UNIT

RST15 tw(RESET_REQzL) (1)

Pulse Width, RESET_REQz active (low)

1200

(1)

This timing parameter is valid only after all supplies are valid and MCU_PORz has been asserted for the specified time.

Table 7-12. RESETSTATz Switching Characteristics

see Figure 7-10

NO.

PARAMETER

MIN

MAX UNIT

RST16 td(RESET_REQzL-RESETSTATzL)

Delay time, RESET_REQz active (low) to

RESETSTATz active (low)

900*T(1)

RST17 td(RESET_REQzH-RESETSTATzH)

Delay time, RESET_REQz inactive (high) to

RESETSTATz inactive (high)

4040*S(2)

(1)

T = Reset Isolation Time (Software Dependent)

(2)

S = MCU_OSC0_XI/XO clock period in ns.

Figure 7-10. RESET_REQz and RESETSTATz Timing Requirements and Switching Characteristics

Table 7-13. EMUx Timing Requirements

see Figure 7-11

NO.

PARAMETER

MIN

MAX UNIT

RST18 tsu(EMUx-MCU_PORz)

Setup time, EMU[1:0] before MCU_PORz inactive

(high)

3*S(1)

RST19 th(MCU_PORz - EMUx)

Hold time, EMU[1:0] after MCU_PORz inactive

(high)

(1)

S = MCU_OSC0_XI/XO clock period in ns.

Figure 7-11. EMUx Timing Requirements

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AM62A7, AM62A7-Q1, AM62A3, AM62A3-Q1

SPRSP77A – MARCH 2023 – REVISED AUGUST 2023

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