PCA5010 datasheet(2/112 Pages) PHILIPS

2 / 112 page

1998 Nov 02

Philips Semiconductors

Product speciﬁcation

Pager baseband controller

PCA5010

CONTENTS

FEATURES

ORDERING INFORMATION

GENERAL DESCRIPTION

BLOCK DIAGRAM

PINNING INFORMATION

FUNCTIONAL DESCRIPTION

6.1

General

6.2

CPU timing

6.3

Overview on the different clocks used within

the PCA5010

6.4

Memory organization

6.5

Addressing

6.6

I/O facilities

6.7

Timer/event counters

6.8

I2C-bus serial I/O

6.9

Serial interface SIO0: UART

6.10

76.8 kHz oscillator

6.11

Clock correction

6.12

6 MHz oscillator

6.13

Real-time clock

6.14

Wake-up counter

6.15

Tone generator

6.16

Watchdog timer

6.17

2 or 4-FSK demodulator, filter and clock

recovery circuit

6.18

AFC-DAC

6.19

Interrupt system

6.20

Idle and power-down operation

6.21

Reset

6.22

DC/DC converter

INSTRUCTION SET

7.1

Instruction Map

LIMITING VALUES

EXTERNAL COMPONENTS

DC CHARACTERISTICS

AC CHARACTERISTICS

CHARACTERISTIC CURVES

TEST AND APPLICATION INFORMATION

APPENDIX 1: SPECIAL MODES OF THE

PCA5010

14.1

Overview

14.2

OTP parallel programming mode

14.3

Test modes

APPENDIX 2: THE PARALLEL

PROGRAMMING MODE

15.1

Introduction

15.2

General description

15.3

Entering the parallel programming mode

15.4

Address space

15.5

Single byte programming

15.6

Multiple byte programming

15.7

High voltage timing

15.8

OTP test modes

15.9

Signature bytes

15.10

Security

APPENDIX 3: OS SHEET

APPENDIX 4: BONDING PAD LOCATIONS

PACKAGE OUTLINE

SOLDERING

19.1

Introduction

19.2

Reflow soldering

19.3

Wave soldering

19.4

Repairing soldered joints

DEFINITIONS

LIFE SUPPORT APPLICATIONS

PURCHASE OF PHILIPS I2C COMPONENTS

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