PCA5010 datasheet(61/112 Pages) PHILIPS

61 / 112 page

1998 Nov 02

Philips Semiconductors

Product speciﬁcation

Pager baseband controller

PCA5010

2. If logic 1s are written to PD and IDL at the same time,

PD takes precedence. The reset value of PCON is

(00000000).

6.21

Reset

To initialize the PCA5010 a reset is performed by either of

2 methods:

• Applying an external reset signal to the RESETIN pin

• Via the on-chip watchdog timer.

The reset state of the output pins is given in separate

tables (Tables 2 to 6). The reset state of SFRs is given in

a separate overview (see Table 1).

While a reset is applied to the device the output RESOUT

is driven LOW.

The internal RAM is not affected by reset. When VDD is

turned on, the RAM contents are indeterminate.

6.21.1

EXTERNAL RESET USING THE RESETIN PIN

The external reset input for the PCA5010 is the RESETIN

pin. A Schmitt trigger is used at the input for noise

rejection. Immediately after the RESETIN goes HIGH, an

internal reset is executed. As a consequence the SFRs

and port pins adopt their reset state, ALE and PSEN are

held HIGH. As long as RESETIN pin stays HIGH, the reset

state is maintained. When RESETIN goes LOW, the

device start-up sequence is executed (see Section 6.22).

6.21.2

EXTERNAL POWER-ON RESET USING THE RESETIN

An automatic reset can be obtained by connecting the

RESETIN pin to VBAT via a capacitor and to VSS via a

resistor. At power-on, the voltage on the RESETIN pin is

equal to VBAT and decreases from VBAT as the capacitor

charges through the resistor to VSS. VRESETIN must remain

higher than the threshold of the Schmitt trigger for a

duration of tRESETIN (see Chapter “AC characteristics”).

The reset configuration is shown in Fig.35.

6.21.3

INTERNAL

RESET

The watchdog which is available in the PCA5010

(see Section 6.16) will force a reset if it is enabled and

expires.

A reset is also forced, when the DC/DC converter restarts

operation from off mode (see Section 6.22.3).

All resets to the microcontroller can be observed as

negative pulses at the output RESOUT.

Fig.35 Application diagram for external power-on reset configuration.

handbook, full pagewidth

MGR344

VBAT

VSS

RESETIN

RESET AND

POWER

CONTROLLER

internal reset

for microcontroller

RESOUT

PCA5010

watchdog

restart DC/DC

converter

µF

10 k

Ω

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