PCA5010 datasheet(17/112 Pages) PHILIPS

17 / 112 page

1998 Nov 02

Philips Semiconductors

Product speciﬁcation

Pager baseband controller

PCA5010

6.6.3

PORT I/O CONFIGURATION

Tables 2 to 6 show the hardwired configuration for the different I/Os of the PCA5010.

Table 2

Port 0 conﬁguration; notes 1 and 2

Notes

1. Option 1S means port configuration option 1 with post-reset state set to HIGH; option 1R means post-reset state will

be LOW.

2. ‘hys’ means input stage with hysteresis.

Table 3

Port 1 conﬁguration

Table 4

Port 2 conﬁguration

PORT PIN

CONFIGURATION

PULL-UP

INPUT

RESET

DRIVE

POSSIBLE

APPLICATION IN A

PAGER

P0.0

quasi bidirectional I/O (option 1S)

yes

hys

HIGH

0.75 mA

LCD_enable (O)

P0.1

quasi bidirectional I/O (option 1S)

yes

hys

HIGH

0.75 mA

SPI_enable (O)

P0.2

quasi bidirectional I/O (option 1S)

yes

hys

HIGH

0.75 mA

SPI_clock (O)

P0.3

quasi bidirectional I/O (option 1S)

yes

hys

HIGH

0.75 mA

SPI_data (O)

P0.4

quasi bidirectional I/O (option 1S)

yes

hys

HIGH

0.75 mA

SPI_data (I)

P0.5

quasi bidirectional I/O (option 1R)

yes

hys

LOW

0.75 mA

RXE (O)

P0.6

quasi bidirectional I/O (option 1R)

yes

hys

LOW

0.75 mA

ROE (O)

P0.7

quasi bidirectional I/O (option 1S)

yes

hys

HIGH

0.75 mA

bandwidth (O)/RSSI (I)

PORT PIN

CONFIGURATION

PULL-UP

INPUT

RESET

DRIVE

POSSIBLE

APPLICATION IN A

PAGER

P1.0

quasi bidirectional I/O (option 1S)

yes

hys

HIGH

0.75 mA

Key

P1.1

quasi bidirectional I/O (option 1S)

yes

hys

HIGH

0.75 mA

Key

P1.2

quasi bidirectional I/O (option 1S)

yes

hys

HIGH

0.75 mA

Key

P1.3

quasi bidirectional I/O (option 1S)

yes

hys

HIGH

0.75 mA

RXD

P1.4

quasi bidirectional I/O (option 1S)

yes

hys

HIGH

0.75 mA

TXD

P1.5

not available

P1.6

I2C-bus open-drain I/O (option 2S)

(slew rate limited)

hys

HIGH

2.25 mA

SCL

P1.7

I2C-bus open-drain I/O (option 2S)

(slew rate limited)

hys

HIGH

2.25 mA

SDA

PORT PIN

CONFIGURATION

PULL-UP

INPUT

RESET

DRIVE

POSSIBLE

APPLICATION IN A

PAGER

P2.0

quasi bidirectional I/O (option 1S)

yes

hys

HIGH

0.75 mA

LCD_Data

P2.1

quasi bidirectional I/O (option 1S)

yes

hys

HIGH

0.75 mA

LCD_Data

P2.2

quasi bidirectional I/O (option 1S)

yes

hys

HIGH

0.75 mA

LCD_Data

P2.3

quasi bidirectional I/O (option 1S)

yes

hys

HIGH

0.75 mA

LCD_Data

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