PCA5010 datasheet(97/112 Pages) PHILIPS

номер детали	PCA5010

подробное описание детали	Pager baseband controller

PDF	112 Pages

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производитель	PHILIPS [NXP Semiconductors]

домашняя страница	http://www.nxp.com

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97 / 112 page

1998 Nov 02

Philips Semiconductors

Product speciﬁcation

Pager baseband controller

PCA5010

15 APPENDIX 2: THE PARALLEL PROGRAMMING

MODE

15.1

Introduction

This document describes the parallel programming mode

of the PCA5010. Parallel programming mode is the mode

where the OTP is programmed by an EPROM

programmer or by a tester.

15.2

General description

The PCA5010 is packaged in a LQFP48 package. Port 0

and Port 2 are available for programming. To program the

OTP of the PCA5010, multiplexing of addresses and data

is necessary. Port 0 is a bidirectional data port, used for

the memory addresses and the program and verify data.

Port 2 is an input port which controls the parallel

programming mode. A coarse block diagram of the OTP

interface in parallel programming mode is given in Fig.67.

Fig.67 The OTP interface in parallel programming mode.

handbook, full pagewidth

MGR163

TEST

CONTROL

ADDL

LATCH

ADDH

LATCH

CONTROL

LOGIC

OTP INTERFACE

parallel programming mode

normal

mode

CTRL

ADDR

(80C51)

CONTROL

ADD

(OTP)

OTPIF

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