STE100A datasheet(41/82 Pages) STMICROELECTRONICS

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STE10/100A

Registers and descriptors description

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7BLE

Big or little endian selection.

0: little endian (for example INTEL)

1: big endian (only for data buffer)

0R/W*

6 ~ 2

DSL

Descriptor skip length. Defines the gap between

two descriptors in the units of DW.

0R/W*

BAR

Bus arbitration

0: receive operations have higher priority

1: transmit operations have higher priority

0R/W*

0SWR

Software reset

1: Reset all internal hardware (excluding

transceivers and configuration registers). This

signal will be cleared by the STE10/100A itself

after the reset process is completed.

0R/W*

R/W* = Before writing the transmit and receive operations should be stopped.

CSR1 (offset = 08h), TDR - Transmit demand register

31~ 0

TPDM

Transmit poll demand.

While the STE10/100A is in the suspended

state, a write to this register (any value) will

trigger the read-tx-descriptor process, which

checks the own-bit; if set, the transmit process is

then started.

FFFFFFFFh

R/W*

R/W* = Before writing the transmit process should be in the suspended state

CSR2 (offset = 10h), RDR - Receive demand register

31 ~ 0

RPDM

Receive poll demand.

While the STE10/100A is in the suspended

state, a write to this register (any value) will

trigger the read-rx-descriptor process, which

checks the own-bit, if set, the process to move

data from the FIFO to buffer is then started.

FFFFFFFFh

R/W*

R/W* = Before writing the receive process should be in the suspended state

CSR3 (offset = 18h), RDB - Receive descriptor base address

31~ 2

SAR

Start address of receive descriptor

R/W*

1, 0

RBND

Must be 00, DW boundary

R/W* = Before writing the receive process should be stopped

CSR4 (offset = 20h), TDB - Transmit descriptor base address

31~ 2

SAT

Start address of transmit descriptor

R/W*

1, 0

TBND

Must be 00, DW boundary

R/W* = Before writing the transmit process should be stopped

Table 8.

Control/status register description (continued)

Bit #

Name

Description

Default

RW type

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