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STE100A датащи(PDF) 20 Page - STMicroelectronics

номер детали STE100A
подробное описание детали  PCI 10/100 Ethernet controller with integrated PHY (3.3V)
PDF  82 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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STE100A датащи(HTML) 20 Page - STMicroelectronics

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Functional description
STE10/100A
20/82
3.5
Network operation
3.5.1
MAC operation
The MAC (Media access control) portion of STE10/100A incorporates the essential protocol
requirements for operating as an IEEE802.3 and ethernet compliant node.
Format
Transmit data encapsulation
The differences between transmit data encapsulation and a MAC frame while operating in
100BASE-TX mode are listed as follows:
–
The first byte of the preamble is replaced by the JK code according to IEE802.3u,
clause 24.
–
After the CRC field of the MAC frame, the STE10/100A will insert the TR code
according to IEE802.3u, clause 24.
Receive data decapsulation
When operating in 100BASE-TX mode the STE10/100A detects a JK code in a preamble as
well as a TR code at the packet end. If a JK code is not detected, the STE10/100A will abort
the reception of the frame and wait for a new JK code detection. If a TR code is not
detected, the STE10/100A will report a CRC error.
Deferring
The inter-frame gap (IFG) time is divided into two parts:
–
FG1 time (64-bit time): If a carrier is detected on the medium during this time, the
STE10/100A will reset the IFG1 time counter and restart to monitor the channel for
an idle again.
–
IFG2 time (32-bit time): After counting the IFG2 time the STE10/100A will access
the channel even though a carrier has been sensed on the network.
Table 2.
Format
Field
Description
Preamble
A 7-byte field of (10101010b)
Start frame diameter
A 1-byte field of (10101011b)
Destination address
A 6-byte field
Source address
A 6-byte field
Length/type
A 2-byte field indicated the frame is in IEEE802.3 format or
ethernet format.
IEEE802.3 format: 0000H ~ 05DCH for length field
Ethernet format: 05DD ~ FFFFH for type field
Data
46(1) ~ 1500 bytes of data information
1.
If padding is disabled (TDES1 bit 23), the data field may be shorter than 46 bytes
CRC
A 32-bit cyclic redundancy code for error detection



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