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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STE100A датащи(PDF) 29 Page - STMicroelectronics |
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STE100A датащи(HTML) 29 Page - STMicroelectronics |
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29 / 82 page  STE10/100A Functional description 29/82 D3hot (Software visible D3) When the STE10/100A is brought back to D0 from D3hot the software must perform a full initialization. The STE10/100A in the D3hot state responds to configuration cycles as long as power and clock are supplied. This requires the device to perform an internal reset and return to a power-up reset condition without the RST# pin asserted. Table 3. Power stage Device state PCI bus state Function context Clock Power Supported actions to function Supported actions from function D0 B0 Full function context in place Full speed Full power Any PCI transaction Any PCI transaction or interrupt D1 B0, B1 Configuration maintained. No Tx and Rx except wake- up events Stopped to full speed PCI configuration access Only wake-up events D2 B0, B1, B2 Configuration maintained. No Tx and Rx Stopped to full speed PCI configuration access(B0, B1) D3hot B0, B1, B2 Configuration lost, full initialization required upon return to D0 Stopped to full speed PCI configuration access(B0, B1) D3cold B3 All configuration lost. Power-on defaults in place on return to D0 No clock No power Power-on reset |
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