CS48L32 datasheet(34/192 Pages) CIRRUS

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Cirrus Logic

DS1219F4

CS48L32

4.2 Input Signal Path

4.2.9

Ultrasonic Signal Detection and Demodulation

The CS48L32 provides ultrasonic signal-processing functions on the input signal paths. Configurable filters and

demodulator functions enable ultrasonic signals to be translated down to the audio band and routed through the digital

mixer core. Ultrasonic signal detection is also supported, with an interrupt event generated when the detection conditions

are met. Two ultrasonic processing blocks are incorporated, with independent configuration controls for each.

The input source for the ultrasonic blocks is configured using the USn_SRC fields (where n identifies the applicable block

US1 or US2). The input signal gain is set using USn_GAIN. The input frequency range is selected by USn_FREQ.

Note: The input path to the ultrasonic blocks incorporate a gain of –6 dB (in addition to the gain selected by USn_GAIN).

The selected input source for ultrasonic signal detection may be either analog or digital (see Section 4.2.6 to configure the

input path for analog or digital input). The CLK frequency for the digital (PDM) input signal paths is configured using INn_

OSR for the respective path (see Table 4-3); the CLK frequency must be 1.536 MHz or 3.072 MHz if ultrasonic signal

detection or demodulation is enabled.

The ultrasonic functions can be supported on any of the input signal paths (IN1–IN2). The inputs to the ultrasonic functions

are independent of the enable, high-pass filter, mute, and digital-volume settings of the respective input signal paths—

these controls have no effect on the ultrasonic functions.

The system clock, SYSCLK, must be present and enabled when using the ultrasonic functions. The SYSCLK frequency

must be a multiple of 6.144 MHz (SYSCLK_FRAC = 0) in this case. See Section 4.8 for details of SYSCLK and the

associated registers.

The signal-detection function is enabled by setting USn_DET_EN. Note that signal detection can be supported without

enabling the ultrasonic demodulator—ideal for low power signal-detection use cases.

The signal-detection algorithm uses an accumulator to count the instances where the input signal exceeds a detection

threshold level—the count increases on each valid detection. If the input signal is below the threshold, a delay (hold time)

is applied before decreasing the accumulator value. If the accumulator reaches the signal-detect level, an interrupt event

is generated to indicate the successful detection. If no valid detection is made for the duration of the hold time, the

accumulator value decreases at an exponential rate characterized by a configurable decay time.

A low-pass filter is incorporated in the signal path of the ultrasonic-detection circuit; this can be used to remove unwanted

signal content. The low-pass filter is enabled using USn_DET_LPF; the cut-off frequency is configured using USn_DET_

LPF_CUT. Note that the filter characteristics vary with USn_FREQ, as described in Table 4-6.

The USn_DET_THR field configures the detection threshold level. The signal-detection rate is determined by the USn_

FREQ setting as described in Table 4-6—this is the frequency at which the input signal is measured against the detection

threshold level.

The USn_DET_NUM field sets the accumulator count threshold at which a valid detection is indicated. The accumulator

hold duration is configured using USn_DET_HOLD. The accumulator decay time constant is configured using USn_DET_

DCY. The hold and decay parameters are defined as a function of the signal-detection rate.

The ultrasonic signal-detection function is an input to the interrupt control circuit and can be used to trigger an interrupt

event—see Section 4.9.

The ultrasonic signal-detect status can be output directly on a GPIO pin as an external indication of the signal detection.

See Section 4.10 to configure a GPIO pin for this function.

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