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CS48L32 датащи(PDF) 22 Page - Cirrus Logic |
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CS48L32 датащи(HTML) 22 Page - Cirrus Logic |
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22 / 192 page ![]() 22 Cirrus Logic DS1219F4 CS48L32 4.1 Overview 4.1.1 Digital Audio Core The CS48L32 uses a core architecture based on all-digital signal routing, making digital audio effects available on all signal paths, regardless of whether the source data input is analog or digital. The digital mixing desk allows different audio effects to be applied simultaneously on many independent paths, while supporting a variety of sample rates. Soft mute and unmute control ensures smooth transitions between use cases without interrupting existing audio streams elsewhere. The CS48L32 incorporates a Halo Core DSP, supporting programmable signal-processing algorithms. The DSP is optimized for audio applications, incorporating configurable FFT, FIR, LMS, and linear/dB-conversion accelerators. The DSP is supported by general-purpose timer and event-logger functions. A quad-SPI (QSPI) master interface enables high-speed data transfers between the DSP and external components such as flash-memory devices. Highly flexible digital mixing, including mixing between audio interfaces, is possible. The CS48L32 performs multichannel full-duplex isochronous sample-rate conversion, providing use-case flexibility across a broad range of system architectures. DRC functions are available for optimizing audio signal levels. In playback modes, the DRC can be used to maximize loudness, while limiting the signal level to avoid distortion, clipping, or battery droop, for high-power output drivers such as speaker amplifiers. In record modes, the DRC assists in applications where the signal level is unpredictable. The five-band parametric EQ functions can be used to compensate for the frequency characteristics of the output transducers. EQ functions can be cascaded to provide additional frequency control. Programmable high-pass and low-pass filters are also available for general filtering applications, such as removal of wind and other low-frequency noise. 4.1.2 Analog and Digital Audio Interfaces The CS48L32 supports up to four analog inputs or up to four digital inputs, multiplexed into two stereo input signal paths. The analog and digital microphone interfaces are powered from the integrated MICBIAS power-supply regulator. The input paths can be configured for low-power operation, ideal for analog or digital microphone input in always-on applications. Ultrasonic signal detection and demodulation functions are provided, supporting a variety of presence-detection applications. The auxiliary PDM interface can be used to provide an audio path between microphones connected to the CS48L32 and a digital input to an external audio processor. The auxiliary PDM interface operates in master or slave modes. Two audio serial ports (ASPs) each support PCM, TDM, and I2S data formats for compatibility with most industry-standard chipsets. ASP1 supports eight input/output channels; ASP2 supports four input/output channels. Bidirectional operation of 32-bit data at sample rates up to 192 kHz sample rates is supported. 4.1.3 Other Features The CS48L32 incorporates a tone generator that can be used for beep functions through any of the audio signal paths. The tone generator provides two 1 kHz outputs, with configurable phase relationship, offering flexibility to create differential signals or test scenarios. A white-noise generator is provided that can be routed within the digital core. The noise generator can provide comfort noise in cases where silence (digital mute) is not desirable. Two pulse-width modulation (PWM) signal generators are incorporated. The duty cycle of each PWM signal can be modulated by an audio source or can be set to a fixed value using a control register setting. The PWM signal generators can be output directly on a GPIO pin. The CS48L32 supports up to 16 GPIO pins, offering a range of input/output functions for interfacing, for detection of external hardware, and for providing logic outputs to other devices. The CS48L32 provides two dedicated GPIO pins; the remaining GPIOs are multiplexed with other pin-specific functions. Comprehensive interrupt functionality is also provided for monitoring internal and external event conditions. |
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