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CS48L32 датащи(PDF) 2 Page - Cirrus Logic |
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CS48L32 датащи(HTML) 2 Page - Cirrus Logic |
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2 / 192 page ![]() 2 Cirrus Logic DS1219F4 CS48L32 Description The CS48L32 is a high-performance low-power audio DSP for smartphones and other portable audio devices. The CS48L32 combines a programmable Halo Core DSP with a variety of power-efficient fixed-function audio processors. The Halo Core DSP supports multiple concurrent audio features, including voice-trigger detection, noise reduction, media enhancement, and many more. Support for third-party DSP programming provides far-reaching opportunities for product differentiation. The Halo Core DSP is integrated within a fully flexible, all-digital mixing and routing engine with sample rate converters, for wide use-case flexibility. The CS48L32 supports up to four analog inputs or up to four PDM digital inputs. Low-power input modes are available for always-on (e.g., voice-trigger) functionality using either analog or digital input. Two further digital audio serial ports are provided, each supporting a wide range of standard audio sample rates and serial interface formats. The audio serial port (ASP) interfaces support multichannel, 32-bit operation at sample rates up to 192 kHz. The integrated FLL provides support for a wide range of system-clock frequencies. The CS48L32 is configured using the SPI™ interface. The device is powered from 1.8 V and 1.2 V supplies. The power, clocking, and output driver architectures are designed to maximize battery life in voice, music, and standby modes. Table of Contents 1 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 WLCSP Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 QFN Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.3 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 Typical Connection Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 Characteristics and Specifications . . . . . . . . . . . . . . . . . . . . . . 8 Table 3-1. Parameter Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 3-2. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Table 3-3. Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 3-4. Analog Input Signal Level—IN1xx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 3-5. Analog Input Pin Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 3-6. Analog Input Gain—Programmable Gain Amplifiers (PGAs) . . . . . . . . . . . . . . 9 Table 3-7. Digital Input Signal Level—INn_PDMDATA . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 3-8. Input Path Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Table 3-9. Digital Input/Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Table 3-10. Miscellaneous Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Table 3-11. Device Reset Thresholds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Table 3-12. System Clock and Frequency-Locked Loop (FLL) . . . . . . . . . . . . . . . . . . . .13 Table 3-13. Digital Input (PDM/DMIC) Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . .13 Table 3-14. AUX PDM Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Table 3-15. Audio Serial Port—Master Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Table 3-16. Audio Serial Port—Slave Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Table 3-17. Audio Serial Port Timing—TDM Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Table 3-18. Control Interface Timing (SPI1 Slave) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 Table 3-19. Master Interface Timing (SPI2 Master) . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 Table 3-20. JTAG Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 Table 3-21. Typical Signal Latency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 4 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.2 Input Signal Path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.3 Digital Core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 4.4 DSP Firmware Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 4.5 DSP Peripheral Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 4.6 Audio Serial Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 4.7 Audio Serial Port Control . . . . . . . . . . . . . . . . . . . . . . . . . . 113 4.8 Clocking and Sample Rates . . . . . . . . . . . . . . . . . . . . . . . . 120 4.9 Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133 4.10 General-Purpose I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 4.11 Control Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144 4.12 Charge Pump, Regulators, and Voltage Reference . . . . . 146 4.13 JTAG Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149 4.14 Power-Up and Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 4.15 Device ID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152 5 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153 5.1 Recommended External Components . . . . . . . . . . . . . . . . 153 5.2 Audio Serial Port Clocking Configurations . . . . . . . . . . . . . 156 5.3 PCB Layout Considerations . . . . . . . . . . . . . . . . . . . . . . . . 161 6 Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161 7 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188 8 Package Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 189 9 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191 10 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191 |
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