CS48L32 datasheet(66/192 Pages) CIRRUS

66 / 192 page

Cirrus Logic

DS1219F4

CS48L32

4.3 Digital Core

The x_RATE fields must not be changed if any of the x_SRCn fields associated with the respective functions is nonzero.

The associated x_SRCn fields must be cleared before writing new values to the x_RATE fields. A minimum delay of 125

s

must be allowed between clearing the x_SRCn fields and writing to the associated x_RATE fields. See Table 4-21 for

details.

Figure 4-26. Digital-Core Sample-Rate Control

The input signal paths may be selected as input to the digital mixers or signal-processing functions. The sample rate for

the input signal paths can either be set globally (using IN_RATE), or can be configured independently for each input

channel (using the respective INnx_RATE fields). The applicable mode depends on IN_RATE_MODE, as described in

Table 4-3.

The ultrasonic demodulator circuits can be selected as input to the digital mixers or signal-processing functions. The

sample rate for these signals are configured using US1_RATE and US2_RATE. The selected sample rate must be equal

to the output rate of the demodulator function, set by the respective USn_FREQ field—see Section 4.2.9.

The ASPn RX inputs may be selected as input to the digital mixers or signal-processing functions. The ASPn TX outputs

are derived from the respective output mixers. The sample rates for audio serial ports (ASP1–ASP2) are configured using

the ASPn_RATE fields (where n identifies the applicable ASP 1 or 2) respectively.

(GPIO pin)

PWM

PWM1

PWM2

PWM_RATE

Tone Generator 1

Tone Generator

Tone Generator 2

TONE_RATE

Noise Generator

White Noise

Generator

NOISE_GEN_RATE

IN_RATE, or INnx_RATE

US1_RATE

US2_RATE

Ultrasonic 1 path

Ultrasonic 2 path

DSP1 Ch 1

DSP1 Ch 2

DSP1 Ch 3

DSP1 Ch 4

DSP1 Ch 5

DSP1 Ch 6

DSP1 – DSP1_TXn_RATE

DSP1 Ch 7

DSP1 Ch 8

DSP Core

DSP1_RXn_RATE

ASPn TX1 output

ASPn TX2 output

ASPn RX1

ASP1 = 8 input, 8 output

ASP2 = 4 input, 4 output

ASP2 – ASP2_RATE

ASP1 – ASP1_RATE

etc.

ASPn RX2

etc.

FX_RATE

EQn

EQ1

EQ2

EQ3

EQ4

LHPFn

LHPF

LHPF1

LHPF2

LHPF3

LHPF4

DRCn

Left

DRCn

Right

DRC

DRC1

DRC2

ISRC1_FSL

ISRC1_FSH

ISRC1 INT1

ISRC1 INT2

ISRC1 DEC1

ISRC1 DEC2

ISRC1 INT3

ISRC1 INT4

ISRC1 DEC3

ISRC1 DEC4

Isochronous

Sample Rate

Converter (ISRC)

ISRC1

ISRCn_FSL

ISRCn_FSH

ISRCn DEC1

ISRCn DEC2

ISRC3

Isochronous

Sample Rate

Converter (ISRC)

ISRC2

ISRCn INT2

ISRCn INT1

IN1L signal path

IN1R signal path

IN2L signal path

IN2R signal path

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