L9966 datasheet(38/122 Pages) STMICROELECTRONICS

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Measurement approaches

9.1

Single conversion (SC)

Once the single conversion mode is selected, the FlexInput performs a single shot voltage conversion (ADC1) or

a resistance measurement (ADC2).

The single conversion command parameters are set through the SC_CONF register.

Single conversion is defined through the following parameters:

•

Type of measurement (voltage or resistance) via R_VOLT_MEAS_SELECT bit – SC_CONFIG register;

•

Full scale range (voltage measurement) or RRx (resistance measurement) via PUPx_DIV[1:0] –

SC_CONFIG register. If either UBSW, VI5V or VIX is measured, the correspondent full scale range is 1.25 V

and the partitioning is defined in Section 11 Voltage dividers and internal signals

•

channel to be converted through ADC_MUX[4:0] – SC_CONFIG register:

–

for voltage measurement: one of the 15 IO channels (both analog and digital) or UBSW, VI5V, VIX,

internal junction temperature Tj = 0.133ADCdec-261.043, only OT is guaranteed see Table 9. Chip

status electrical parameters. or the internal bandgap voltage reference (BG)

–

for resistance measurement: one of the 12 IOx analog channels only

–

in case of invalid code selection, the ADC will run the conversion anyhow, but the result is meaningless

•

Start the conversion through ADC_RUN bit – SC_CONFIG register. This bit can be only written to 1 in order

to start the conversion and it is automatically reset once the conversion ends.

•

ADC settling time in ADC_TIMING register

Single conversion result is available in a dedicated register, SC_RESULT.

The result is written on:

•

A 12 bits field ADC[11:0] in case of voltage measurement; a flag NEW_RSLT_FLG is also set in case new

conversion result is available. This flag is reset once the register is read, but the result on the register is still

kept.

•

A 15 bits field ADC[14:0] in case of resistance measurement. Once the register is read, it is automatically

reset, 0x0 value indicates the measurement has been already read.

9.2

Sequencer

The sequencer controls the scheduled execution of analog-to-digital conversions on ADC1 (voltage

measurement) and ADC2 (resistance measurement).

As showed in Figure 18, sequencer operates as 3 execution units (EU1, EU2, SC) that fetch conversion requests

from registers and passes them to ADCs according to a priority mechanism.

Execution units EU1 and EU2 are able to perform a sequence of ADC conversions. The sequence is programmed

as per the following:

•

(INIT_PC_EUx[3:0]) and to enable the sequence start. Sequencer start is triggered in two ways. The first is

SPI setting of EUx_EN bit, the second is through SYNC pin, toggling once EUx_SYNC_EN bit is set. In this

last case EUx_EN bit is automatically set with a rising edge of the SYNC pin occurs.

•

registers SQNCR_CMD[15:1] to instruct the sequencer about the conversions to process and the next line to

be addressed.

Sequences can be configured as one of the following:

•

Closed loop: configuration is such that the last step points back to any of the previous lines of the sequence,

thus forming a closed continuous loop.

•

Open loop: configuration is such that the last sequence step points to ENDLOOP code on NXT_PC (code

‘0000’). ENDLOOP condition occurs and sequence stops.

L9966

Measurement approaches

DS12459 - Rev 10

page 38/122

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