L9966 datasheet(34/122 Pages) STMICROELECTRONICS

34 / 122 page

There are 4 different input ranges for the ADC conversion of analog inputs and 3 for the digital inputs. The default

selection of the input full scale for the analog channels is 5 V, while for digital channels it is 1.25 V. Regardless of

the programmed full scale range on a channel, each time the ADC1 conversion is over, the full scale range of the

channel goes back to its default state.

Note:

An overshoot to VPRE occurs in case it is requested a voltage conversion with 20 V or 40 V full scale range on

IO configured as PullUp at 5V_REF or VVAR.

When converting on the digital inputs, the CTR[1:0] in the CURR_SRC_CTRL register have to be set to UTh2 or

UTh_ratio thresholds.

Every time the full scale range in the ADC voltage moves from the default value (5 V, div factor 4) to a

different one, a settling time (see Table 22) is automatically added to the configurable setting time (CT_AD[2:0] in

ADC_TIMING register) to allow the signal to reach a steady value.

ADC1 reference voltage is ratiometric with 5 V_REF voltage, so no absolute internal reference is used for ADC1

conversion. Digital out is Vin/Vfullrange represented over 12 bits.

Table 22 shows the contributors to the accuracy of the overall conversion, from input signal to digital readout. Two

parts are considered: the input voltage dividers, with their accuracy, and the ADC block, with its accuracy. To get

the overall accuracy of conversion, both these contributors must be taken into account.

In order to reach the best accuracy with the full range of 5 V, calibration has to be activated by setting CALIB_SEL

to ‘1’. Calibration feature is guaranteed in case calibration fault CALIB_FLT flag in GEN_STATUS register is not

set.

By default the calibration is disabled (CALIB_SEL = ‘0’): the status of the CALIB_FLT flag should be verified, then

the calibration eventually enabled or kept disabled accordingly.

Table 22. ADC1 parameters

Symbol

Parameter

Condition

Min

Typ

Max

Unit

UBSW = 7.5 V:36 V, VDD5V = 4.85 V:5.15 V, Tj-max = 150 °C unless otherwise specified.

ADC1res

ADC resolution

bit

ADC1range_1_25

ADC input range

Full range: 1.25 V, buffer structure

0.03

1.23

IO 1-15

ADC1range_5

ADC input range

Full range: 5 V

0.05

4.95

IO 1-12

ADC1range_20

ADC input range

Full range: 20 V

0.45

95%FR=18.3+-3%

IO 1-4

95%FR=19.0+-3%

IO5-15

ADC1range_40

ADC input range

Full range: 40 V

0.8

95%FR=38.9+-3%

IO 1-15

ADC1err

ADC block error

With calibration Design info

(1LSB = 1.22 mV)

LSB

ADC1err_a_1_25

ADC1 total measurement

error on analog inputs

Including all error contributions

(VDD5REF excl.) While no ratiometric

comparator running Full range 1.25 V

(1LSB = 0.3 mV)

LSB IO 1-12

ADC1err_a_5

ADC1 total measurement

error on analog inputs

Including all error contributions

(VDD5REF excl.) While no ratiometric

comparator running Full range 5 V

(1LSB = 1.22 mV)

CALIB_FLT=0 and CALIB_SEL=1, with

ADC1tau_1_4_low selected

LSB IO 1-12

ADC1err_a_5_no_calib

ADC1 total measurement

error on analog inputs

Including all error contributions

(VDD5REF excl.) While no ratiometric

comparator running Full range 5 V

(1LSB = 1.22 mV)

CALIB_SEL=0

LSB IO 1-12

ADC1err_a_20

ADC1 total measurement

error on analog inputs

Including all error contributions

(VDD5REF excl.) While no ratiometric

comparator running Full range 20 V

(1LSB = 5 mV)

LSB IO 1-12

L9966

ADC1: voltage measurement

DS12459 - Rev 10

page 34/122

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