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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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FS5502 датащи(PDF) 85 Page - NXP Semiconductors |
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FS5502 датащи(HTML) 85 Page - NXP Semiconductors |
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85 / 113 page  NXP Semiconductors FS5502 High voltage PMIC with multiple SMPS and LDO 26 Application information FS5502 BUCK3_IN can be VPRE LDO1_IN can be VPRE VDDIO input can be LDOx, VPRE or other VDDI2C input can be LDOx, VPRE or other VMON1 is compared to 0.8 V WAKE1 global and WAKE2 local in this example aaa-033208 47 F 1 H 1 H 100 nF 1 nF 6.8 nF 5.1 kΩ 1 MΩ 1 MΩ 10 mΩ 5.1 kΩ 5.1 kΩ 5.1 kΩ 100 kΩ VSUP1 LDO1_IN PSYNC VBOOST BUCK1-FB BUCK1-SW VDDI2C VDDIO VCOREMON 3.3 V VCORE RESET POR single package decoulping capacitors close to device pin VBAT VSUP2 WAKE1 VBOS 10 F 22 nF 2 x 10 F 60 F 100 nF 40 F/ 100 nF 4.7 F 100 nF 1 nF 47 nF 6.8 H 1 H 10 nF 22 nF 5 V WAKE2 DBG Wake up source To ext IC To synch ext IC with FIN Independent voltage monitoring from VR5500 or other regulators I2C communication (for OTP programming) VDDI2C VDDI2C 10 F 100 nF LDO1 5 V BUCK3-FB SDA SCL BUCK3-SW CAN 4.7 F 40 F/ 100 nF 100 nF FOUT VMON1 MCU 5.1 kΩ VDDIO PGOOD INTB FIN 5.1 kΩ 5.1 kΩ VDDIO VBOS RSTB BUCK1-IN VPRE 4.7 F 100 nF BUCK3-IN RSTB 1 nF PGOOD 1 nF INTB 100 nF VDDIO 100 nF VDDI2C Figure 30. FS5502 Application diagram 27 Fail-safe domain description 27.1 Functional description The fail-safe domain is electrically independent and physically isolated. The fail-safe domain is supplied by its own reference voltages and current, has its own oscillator. The fail-safe domain and the dedicated pins are represented in Figure 31: FS5502 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 4 — 27 October 2021 85 / 113 |
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