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FS5502 датащи(PDF) 28 Page - NXP Semiconductors |
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FS5502 датащи(HTML) 28 Page - NXP Semiconductors |
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28 / 113 page ![]() NXP Semiconductors FS5502 High voltage PMIC with multiple SMPS and LDO Bit 15 14 13 12 11 10 9 8 Write MEMORY0[7:0] Read MEMORY0[7:0] Reset 0 0 0 0 0 0 0 0 Bit Symbol Description Free memory field for data storage 0... ...1 16 bits free memory 23 to 8 MEMORY0[15:0] Reset condition: POR Table 30. M_MEMORY0 register bit description 10.15 M_MEMORY1 register Bit 23 22 21 20 19 18 17 16 Write MEMORY1[15:0] Read MEMORY1[15:0] Reset 0 0 0 0 0 0 0 0 Table 31. M_MEMORY1 register bit allocation Bit 15 14 13 12 11 10 9 8 Write MEMORY1[15:0] Read MEMORY1[15:0] Reset 0 0 0 0 0 0 0 0 Bit Symbol Description Free memory field for data storage 0… …1 16 bits free memory 23 to 8 MEMORY1[15:0] Reset condition: POR Table 32. M_MEMORY1 register bit description 10.16 M_DEVICEID register Bit 23 22 21 20 19 18 17 16 Read FMREV[3:0] MMREV[3:0] Reset 0 0 1 1 0 0 0 0 Table 33. M_DEVICEID register bit allocation Bit 15 14 13 12 11 10 9 8 Read DEVICEID[7:0] Reset 0 0 0 0 0 0 0 0 FS5502 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 4 — 27 October 2021 28 / 113 |
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