FS5502 datasheet(46/113 Pages) NXP

номер детали	FS5502

подробное описание детали	High voltage PMIC with multiple SMPS and LDO

PDF	113 Pages

Scroll/Zoom	100%

производитель	NXP [NXP Semiconductors]

домашняя страница	http://www.nxp.com

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46 / 113 page

NXP Semiconductors

FS5502

High voltage PMIC with multiple SMPS and LDO

Address

Bit

Symbol

Value

Description

VSUP undervoltage threshold

configuration

4.9 V for Vpre < 4.5 V

OTP_CFG_VSUP_UV

VSUP_CFG

6.2 V for Vpre > 4.5 V

Device I2C address

0000

Address D0

…

...

OTP_CFG_I2C

3 to 0

M_I2CDEVADDR[3:0]

1111

Address D15

Regulator assigned to VDDIO

000

External regulator

001

VPRE

010

RESERVED

011

LDO2

100

BUCK3

101

External regulator

110

External regulator

OTP_CFG_OV

2 to 0

VDDIO_REG_ASSIGN[2:0]

111

External regulator

OTP_CFG_DEVID

7 to 0

DeviceID[7:0]

Device ID

Table 59. Main OTP bit description...continued

12.3 Fail-safe OTP bit description

Address

Bit

Symbol

Value

Description

VCORE (VBUCK1) monitoring voltage

0100 0000

0.8 V

0100 0100

0.825 V

0101 0000

0.9 V

0101 1000

0.95 V

0110 0000

1 V

01100100

1.025 V

0110 0101

1.03125 V

0110 0000

1.1 V

1000 0000

1.2 V

1000 1000

1.25 V

1001 0000

1.3 V

1001 1000

1.35 V

1010 0000

1.4 V

1011 0000

1.5 V

OTP_CFG_UVOV_1

7 to 0

VCORE_V[7:0]

1011 0001

1.8 V

Table 60. Fail-safe OTP bit description

FS5502

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 4 — 27 October 2021

46 / 113

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