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FS5502 датащи(PDF) 17 Page - NXP Semiconductors

номер детали FS5502
подробное описание детали  High voltage PMIC with multiple SMPS and LDO
PDF  113 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo NXP - NXP Semiconductors

FS5502 датащи(HTML) 17 Page - NXP Semiconductors

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NXP Semiconductors
FS5502
High voltage PMIC with multiple SMPS and LDO
Bit
Symbol
Description
Standby mode request
0
Device remains in current state
1
Device enters in Standby mode
8
GOTOSTBY
Reset condition: n.a.
Table 10. M_MODE register bit description...continued
10.5 M_REG_CTRL1 register
Bit
23
22
21
20
19
18
17
16
Write
VPRE_PD_DIS
VPDIS
0
BUCK1DIS
0
BUCK3DIS
LDO1DIS
0
Read
VPRE_PD_DIS
RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED
Reset
0
0
0
0
0
0
0
0
Table 11. M_REG_CTRL1 register bit allocation
Bit
15
14
13
12
11
10
9
8
Write
0
VPEN
0
BUCK1EN
0
BUCK3EN
LDO1EN
0
Read
RESERVED
RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED
Reset
0
0
0
0
0
0
0
0
Bit
Symbol
Description
Force disable of VPRE pull down
0
No effect (VPRE pull down is automatically controlled by the logic)
1
VPRE pull down disable request
23
VPRE_PD_DIS
Reset condition: POR
Disable request of VPRE
0
No effect (regulator remains in existing state)
1
VPRE disable request
22
VPDIS
Reset condition: POR
Disable request of BUCK1
0
No effect (regulator remains in existing state)
1
BUCK1 disable request
20
BUCK1DIS
Reset condition: POR
Disable request of BUCK3
0
No effect (regulator remains in existing state)
1
BUCK3 disable request
18
BUCK3DIS
Reset condition: POR
Disable request of LDO1
0
No effect (regulator remains in existing state)
1
LDO1 disable request
17
LDO1DIS
Reset condition: POR
14
VPEN
Enable request of VPRE
Table 12. M_REG_CTRL1 register bit description
FS5502
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 4 — 27 October 2021
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