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FS5502 датащи(PDF) 44 Page - NXP Semiconductors

номер детали FS5502
подробное описание детали  High voltage PMIC with multiple SMPS and LDO
PDF  113 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo NXP - NXP Semiconductors

FS5502 датащи(HTML) 44 Page - NXP Semiconductors

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NXP Semiconductors
FS5502
High voltage PMIC with multiple SMPS and LDO
Address
Register
Bit
Symbol
Value
Description
10
2.6 mV/µs
11
2.23 mV/µs
BUCK3 soft start/stop
configurability
00
10.41 mV/µs
01
3.47 mV/µs
10
2.6 mV/µs
5 to 4
DVS_BUCK3[1:0]
11
2.08 mV/µs
Power up/down slot duration
0
250 µs
3
Tslot
1
1.0 ms
BUCK3 sequencing slot
000
Regulator start and stop in Slot 0
001
Regulator start and stop in Slot 1
010
Regulator start and Stop in Slot 2
011
Regulator start and stop in Slot 3
100
Regulator start and stop in Slot 4
101
Regulator start and stop in Slot 5
110
Regulator start and stop in Slot 6
2 to 0
VB3S[2:0]
111
Regulator does not start (enabled
by I2C)
VPRE phase (delay) selection
000
no delay
001
delay 1
010
delay 2
011
delay 3
100
delay 4
101
delay 5
110
delay 6
24
OTP_CFG_CLOCK_1
5 to 3
VPRE_ph[2:0]
111
delay 7
VBUCK1 phase (delay) selection
000
no delay
001
delay 1
010
delay 2
011
delay 3
100
delay 4
101
delay 5
110
delay 6
25
OTP_CFG_CLOCK_2
5 to 3
BUCK1_ph[2:0]
111
delay 7
Table 59. Main OTP bit description...continued
FS5502
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 4 — 27 October 2021
44 / 113



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