ATXP032 datasheet(53/113 Pages) DIALOG

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ATXP032

DS-ATXP032–114I–4-2020

10.7

Protected States and the Write Protect (WP) Pin

The WP pin is not linked to the memory array itself and has no direct effect on the protection status of the memory

array. Instead, the WP pin, in conjunction with the SPRL (Sector Protection Registers Locked) bit in the

Status/Control register, is used to control the hardware locking mechanism of the device. For hardware locking to

be active, two conditions must be met – the WP pin must be asserted and the SPRL bit must be in the logic “1”

state.

When hardware locking is active, the Sector Protection registers are locked and the SPRL bit itself is also locked.

Therefore, sectors that are protected are locked in the protected state, and sectors that are unprotected are locked

in the unprotected state. These states cannot be changed as long as hardware locking is active, so the Protect

Sector, Unprotect Sector, and Write Status Register commands are ignored. In order to modify the protection

status of a sector, the WP pin must first be deasserted, and the SPRL bit in the Status/Control register must be

reset back to the logic “0” state using the Write Status Register command. When resetting the SPRL bit back to a

logic “0”, it is not possible to perform a global protect or global unprotect at the same time since the Sector

Protection registers remain soft-locked until after the Write Status Register command has been executed.

If the WP pin is permanently connected to GND, then once the SPRL bit is set to a logic “1”, the only way to reset

the bit back to the logic “0” state is to power-cycle or reset the device. This allows a system to power-up with all

sectors software protected but not hardware locked. Therefore, sectors can be unprotected and protected as

needed and then hardware locked at a later time by simply setting the SPRL bit in the Status/Control register.

When the WP pin is deasserted, or if the WP pin is permanently connected to VCC, the SPRL bit in the

Status/Control register can still be set to a logic “1” to lock the Sector Protection registers. This provides a software

locking ability to prevent erroneous Protect Sector or Unprotect Sector commands from being processed. When

changing the SPRL bit to a logic “1” from a logic “0”, it is also possible to perform a global protect or global

unprotect at the same time by writing the appropriate values into bits 5, 4, 3, and 2 of the Status/Control register.

In octal mode, the WP pin is used as I/O

2. The WP pin feature is disabled, and the device behaves as if the WP pin

is connected to a logic ‘1’ state.

Tables 10-4 and 10-5 detail the various protection and locking states of the device. .

Table 10-4. Sector Protection Register States

Sector Protection Register n (1)

Sector n(1)

(Don’t Care)

Unprotected

Protected

1. “n” represents a sector number

Table 10-5. Hardware and Software Locking

SPRL

Locking

SPRL Change Allowed

Sector Protection Registers

Can be modified from 0 to 1

Unlocked and modifiable using the Protect and Unprotect Sector

commands. Global Protect and Unprotect can also be performed.

Hardware

Locked

Locked in current state. Protect and Unprotect Sector commands

is ignored. Global Protect and Unprotect cannot be performed.

Can be modified from 0 to 1

Unlocked and modifiable using the Protect and Unprotect Sector

commands. Global Protect and Unprotect can also be performed.

Software

Locked

Can be modified from 1 to 0

Locked in current state. Protect and Unprotect Sector commands

is ignored. Global Protect and Unprotect cannot be performed.

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