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ADRF6821 датащи(PDF) 10 Page - Analog Devices

номер детали ADRF6821
подробное описание детали  450 MHz to 2800 MHz, DPD RFIC with Integrated Fractional-N PLL and VCO
PDF  61 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

ADRF6821 датащи(HTML) 10 Page - Analog Devices

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ADRF6821
Data Sheet
Rev. A | Page 10 of 61
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NOTES
1. THE EXPOSED PAD MUST BE CONNECTED TO A GROUND
PLANE WITH LOW THERMAL IMPEDANCE.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VCM_Q
VDD_DIG
GND
RFIN_FB0
GND
VCC_LO1
RFBT_FB
VCC_LO2
RF_SEL0
RF_SEL1
RFIN_FB1
GND
SLEEP
VCM_I
34
33
32
31
30
29
42
41
40
39
38
37
36
VCCDIV_3V3
VCCVCO_3V3
EXT_LO_IN–
EXT_LO_IN+
VTUNE
DCL_BIAS
VCCCP_3V3
CPOUT
GND
LO_OUT–
LO_OUT+
VCCLO_AUX_3V3
VCCLO_MIX_3V3
35
VCCFBDIV_3V3
ADRF6821
TOP VIEW
(Not to Scale)
Figure 3. Pin Configuration
Table 9. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
VCM_Q
Q Channel VCM Input.
2
VDD_DIG
Digital VDD (1.8 V) Pin from On-Chip LDO.
3, 5, 12, 16,
19, 52, 55
GND
Ground.
4
RFIN_FB0
RF Input 0 Single-Pole, Double-Throw (SPDT), 50 Ω Single-Ended.
6
VCC_LO1
LO Path VCC.
7
RFBT_FB
RF Input Low Frequency Balun Connection. This pin requires a dc block to an external inductor.
8
VCC_LO2
LO Path VCC.
9
RF_SEL0
RF Input 0 Select.
10
RF_SEL1
RF Input 1 Select.
11
RFIN_FB1
RF Input 1 SPDT, 50 Ω Single-Ended.
13
SLEEP
Pin Controllable Fast Turn On/Off (1.8 V and 3.3 V Compatible).
14
VCM_I
I Channel VCM Input.
15
VCC_3V3_I
I Channel 3.3 V Supply.
17
IF_IOUT+
I Channel IF Positive Output.
18
IF_IOUT−
I Channel IF Negative Output.
20
VCC_IFMIX_I
I Channel IF Amplifier VCC Supply.
21
VDCPL_I
I Channel Mixer Decoupling.
22
VCC_IFMIX_I
I Channel Mixer VCC Supply.
23
LO_LCKDT
LO Lock Detect.
24
SCLK
SPI Clock.
25
SDIO
SPI Data Input/Output in 3-Wire Mode. SPI data input in 4-wire mode.
26
SDO
SPI Data Output. SDO used in 4-wire mode only.



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