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ADRF6821 датащи(PDF) 45 Page - Analog Devices |
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ADRF6821 датащи(HTML) 45 Page - Analog Devices |
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45 / 61 page ![]() Data Sheet ADRF6821 Rev. A | Page 45 of 61 Address: 0x0054, Reset: 0x00, Name: DC_COMP_Q_CHAN_RF1 DC Com pens ation Q Channel 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 [7:0] CODE_DC_QDAC_RF1 (R/W) Table 40. Bit Descriptions for DC_COMP_Q_CHAN_RF1 Bits Bit Name Settings Description Reset Access [7:0] CODE_DC_QDAC_RF1 DC Compensation Q Channel. Controls the dc correction applied to the IF path. LSB is approximately ½ mV referred to the output. Value is signed magnitude notation. 0xFF is the most negative, and 0x7F is the most positive. 0x0 R/W Address: 0x0060, Reset: 0x00, Name: LPF_BW_SEL MSB for LPF Bandw idth Select LSB for LPF Bandw idth Select 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 [ 7 :2 ] RES ERV ED [ 0 ] S EL_LP F_BW _M S B ( R/W ) [ 1 ] S EL_LP F_BW _LS B ( R/W ) Table 41. Bit Descriptions for LPF_BW_SEL Bits Bit Name Settings Description Reset Access [7:2] RESERVED Reserved. 0x0 R 1 SEL_LPF_BW_LSB LSB for LPF Bandwidth Select. See the Theory of Operation section. 0x0 R/W 0 SEL_LPF_BW_MSB MSB for LPF Bandwidth Select. See the Theory of Operation section. 0x0 R/W Address: 0x0070, Reset: 0x00, Name: IF_AMP_CTRL I Channe l IF Am p lifie r Enab le (0 :o ff 1:o n) Q Channel IF Am plifier Enable (0:off 1:o n) 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 [ 7 :2 ] RES ERV ED [ 0 ] EN _IFAM P _I ( R/W ) [ 1 ] EN _IFAM P _Q ( R/W ) Table 42. Bit Descriptions for IF_AMP_CTRL Bits Bit Name Settings Description Reset Access [7:2] RESERVED Reserved. 0x0 R 1 EN_IFAMP_Q Q Channel IF Amplifier Enable (0: off and 1: on). IF output amplifier enable. 0x0 R/W 0 EN_IFAMP_I I Channel IF Amplifier Enable (0: off and 1: on). IF output amplifier enable. 0x0 R/W Address: 0x0080, Reset: 0x00, Name: LO_CTRL Inv e rt Q Channe l LO Po larity Inv e rt I Channe l LO Po larity 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 [ 7 :3 ] RES ERV ED [ 0 ] RES ERV ED [ 2 ] SEL_LO D RV_PRED RVQ _PO L ( R/W ) [ 1 ] SEL_LO D RV_PRED RVI_PO L ( R/W ) Table 43. Bit Descriptions for LO_CTRL Bits Bit Name Settings Description Reset Access [7:3] RESERVED Reserved. 0x0 R 2 SEL_LODRV_PREDRVQ_POL Invert Q Channel LO Polarity. Selects the polarity for the Q channel LO path. 0x0 R/W 0: normal polarity. 1: inverted polarity. 1 SEL_LODRV_PREDRVI_POL Invert I Channel LO Polarity. Selects the polarity for the I channel LO path. 0x0 R/W 0: normal polarity. 1: inverted polarity. 0 RESERVED Reserved. 0x0 R/W |
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