ADF4401ABCEZ datasheet(23/39 Pages) AD

23 / 39 page

Data Sheet

ADF4401A

Rev. 0 | Page 23 of 39

Address: 0x00, Default: 0x18, Name: REG0000

Copy of Bit-0.

Soft Res et.

Copy of Bit-1.

Reads LSB firs t when Active.

Copy of Bit-2.

Set Addres s in As cending Order (Default

is As cending).

Copy of Bit-3.

Choos e Between 3-Pin or 4-Pin Operation.

[7] SOFT_RESET_R (R/W)

[0] SOFT_RESET (R/W)

[6] LSB_FIRST_R (R/W)

[1] LSB_FIRST (R/W)

[5] ADDRESS_ASCENSION_R (R/W)

[2] ADDRESS_ASCENSION (R/W)

[4] SDO_ACTIVE_R (R/W)

[3] SDO_ACTIVE (R/W)

Table 9. Bit Descriptions for REG0000

Bit(s)

Bit Name

Description

Default

Access

SOFT_RESET_R

Copy of Bit 0.

0x0

R/W

LSB_FIRST_R

Copy of Bit 1.

0x0

R/W

ADDRESS_ASCENSION_R

Copy of Bit 2.

0x0

R/W

SDO_ACTIVE_R

Copy of Bit 3.

0x1

R/W

SDO_ACTIVE

Choose between 3-pin or 4-pin operation.

0x1

R/W

0: 3-pin.

1: 4-pin. Enables the SDIO pin and the SDIO pin becomes an input only.

ADDRESS_ASCENSION

Set Address in Ascending Order (Default Is Ascending).

0x0

R/W

0: descending.

1: ascending.

LSB_FIRST

Reads LSB First when Active.

0x0

R/W

SOFT_RESET

Soft Reset.

0x0

R/W

0: normal operation.

1: soft reset.

Address: 0x01, Default: 0x00, Name: REG0001

Single Ins truction.

Stalling.

Mas ter Readback Control.

[7] SINGLE_INSTRUCTION (R/W)

[4:0] RESERVED

[6] STALLING (R/W)

[5] MASTER_READBACK_CONTROL (R/W)

Table 10. Bit Descriptions for REG0001

Bit(s)

Bit Name

Description

Default

Access

SINGLE_INSTRUCTION

Single Instruction. SPI stream mode is disabled if the SINGLE_INSTRUCTION

bit is set to 1.

0x0

R/W

STALLING

Stalling.

0x0

R/W

MASTER_READBACK_CONTROL

Master Readback Control.

0x0

R/W

[4:0]

RESERVED

Reserved.

0x0

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