ADF4401ABCEZ datasheet(3/39 Pages) AD

3 / 39 page

Data Sheet

ADF4401A

Rev. 0 | Page 3 of 39

SPECIFICATIONS

Supply voltage (AVDD) = VCC_PLL = VCC_CAL = VRF_INT = VRF_OUT = VCC_DIV = VCC_NDIV = VCC_REG = VCC_MIX = 3.3 V ±

5%, VCC_VCO = VCC_RF = VCC_IF1 = VCC_IF2 = 5 V ± 5%, GND = 0 V, dBm referred to 50 Ω, and TA = −25°C to +85°C, unless

otherwise noted.

Table 1.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

RF OUTPUT CHARACTERISTICS

RF Output Frequency

62.5

8000

MHz

RF Output Power (RF_OUT_POWER = 11)

dBm

RF8N = 1 GHz, 3.3 nH inductor to VRF_OUT,

single-ended

dBm

RF8N = 8 GHz, 3.3 nH inductor to VRF_OUT,

single-ended

RF Output Power Variation

±1

RF8P or RF8N = 5 GHz

RF Output Power Variation (over

Frequency)

±4

RF8P or RF8N = 1 GHz to 8 GHz

Harmonic Content (RF8P and RF8N)

Second Harmonic

−25

dBc

Fundamental VCO output

−25

dBc

Divided VCO output

Third Harmonic

−12

dBc

Fundamental VCO output

−15

dBc

Divided VCO output

LO_IN to RF Output

dBc

Spurious-Free Dynamic Range

dBc

Within 100 MHz offset of carrier

−90

dBc

>100 MHz offset of carrier, RF output (RFOUT) > 1 GHz

EXTERNAL LO

LO_IN Frequency (Doubler Disabled)

3.0

9.0

GHz

LO_IN Frequency (Doubler Enabled)

1.5

4.5

GHz

External LO Power (LO_IN)

−3

dBm

External LO Port Return Loss

VCO Frequency Feedthrough

−23

dBm

Measured at LO_IN

Other Spurious Feedthrough

−40

dBm

Measured at LO_IN

Input Power for 1 dB Output

Compression (P1dB)

dBm

INTERMEDIATE FREQUENCY (IF) OUTPUT

IF Output Frequency (fIF)

1000

MHz

IF Output Power

dBm

6 GHz RF output, internal RF setting = 1, LO

power = 0 dBm, LO_IN = 6.6 GHz, fIF = 600 MHz

dBm

Internal RF setting = 0, LO power = 0 dBm, LO_IN

= 6.6 GHz, fIF = 600 MHz

LO_IN to IFOUT Isolation

−82

dBc

Internal RF setting = 0, LO_IN = 0 dBm,

Other Spurious Signals on IFOUT

−20

dBc

Main contributor is IFOUT harmonics

IF Output Return Loss

−9

Mismatch for Compliant Operation

−10

≤900 MHz

−2

>900 MHz

LOGIC INPUTS

CS, SDIO, SCLK, X2_EN, and CE are 3 V logic

Input High Voltage (VINH)

1.5

Input Low Voltage (VINL)

0.4

Input High Current (IINH) and Input Low

Current (IINL)

±1

µA

CS, SDIO, SCLK, and CE

±100

µA

X2_EN

Input Capacitance (CIN)

3.0

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