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ADF4401ABCEZ датащи(PDF) 32 Page - Analog Devices |
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ADF4401ABCEZ датащи(HTML) 32 Page - Analog Devices |
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32 / 39 page ![]() ADF4401A Data Sheet Rev. 0 | Page 32 of 39 Address: 0x2F, Default: 0x92, Name: REG002F Res erved. Res erved. Res erved. 0 0 1 1 2 0 3 0 4 1 5 0 6 0 7 1 [7:5] RESERVED [2:0] ALC_REF_DAC_NOM_VCO4 (R/W) [4] ALC_RECT_SELECT_VCO4 (R/W) [3] ALC_REF_DAC_LO_VCO4 (R/W) Table 33. Bit Descriptions for REG002F Bit(s) Bit Name Description Default Access [7:5] RESERVED Reserved. Set to 0x4 for normal operation. 0x4 R/W 4 ALC_RECT_SELECT_VCO4 Reserved. 0x1 R/W 3 ALC_REF_DAC_LO_VCO4 Reserved. 0x0 R/W [2:0] ALC_REF_DAC_NOM_VCO4 Reserved. 0x2 R/W Address: 0x30, Default: 0x3F, Name: REG0030 Sets the Autocalibration Tim e per Stage. 0 1 1 1 2 1 3 1 4 1 5 1 6 0 7 0 [7:0] VCO_BAND_DIV (R/W) Table 34. Bit Descriptions for REG0030 Bit(s) Bit Name Description Default Access [7:0] VCO_BAND_DIV Sets the Autocalibration Time per Stage. See the VCO Calibration Time section for details. 0x3F R/W Address: 0x31, Default: 0xA7, Name: REG0031 Us ed as Part of the ALC Wait Tim e and Synthetic Lock Tim e. 0 1 1 1 2 1 3 0 4 0 5 1 6 0 7 1 [7:0] TIMEOUT[7:0] (R/W) Table 35. Bit Descriptions for REG0031 Bit(s) Bit Name Description Default Access [7:0] TIMEOUT[7:0] Used as Part of the ALC Wait Time and Synthetic Lock Time. See the VCO Calibration Time section for details. 0xA7 R/W Address: 0x32, Default: 0x04, Name: REG0032 ADC Mux Select. Us ed as Part of the ALC Wait Tim e and Synthetic Lock Tim e. ADC Enable. ADC Fas t Convers ion. Enables ADC Convers ion. ADC Continuous Convers ion. 0 0 1 0 2 1 3 0 4 0 5 0 6 0 7 0 [7] ADC_MUX_SEL (R/W) [1:0] TIMEOUT[9:8] (R/W) [6] RESERVED [2] ADC_ENABLE (R/W) [5] ADC_FAST_CONV (R/W) [3] ADC_CONVERSION (R/W) [4] ADC_CTS_CONV (R/W) Table 36. Bit Descriptions for REG0032 Bit(s) Bit Name Description Default Access 7 ADC_MUX_SEL ADC Mux Select. 0x0 R/W 0: proportional to absolute temperature (PTAT) voltage muxed to ADC input. 1: scaled VTUNE voltage muxed to ADC input. 6 RESERVED Reserved. 0x0 R |
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