ADF4401ABCEZ datasheet(19/39 Pages) AD

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Data Sheet

ADF4401A

Rev. 0 | Page 19 of 39

HMC3716

PFD

VTUNE

SMA100B

LPF

ACTIVE FILTER

USING LT6200

SMA100B

CLOCK INPUT

VCO

MIXER

DIV

VTUNE

RF OUTPUT

LO INPUT

ADF4401A

IFOUT

REFP, REFN

AMP

10dB PAD

ADG1219

HPF

AMP

Figure 32. ADF4401A Evaluation Setup Block Diagram

VCO CALIBRATION, A WORKED EXAMPLE

Internal PLL blocks (internal PFD and internal N and R dividers)

are used for VCO calibration. All parameters are referred to as

internal PLL in this section. Use the following equations to

program the ADF4401A synthesizer:

PFD

RFOUT

FRAC2

FRAC1

MOD2

INT

MOD1

RF Divider





+×





(7)

where:

fRFOUT is the RF output frequency.

INT is the integer division factor.

FRAC1 is the fractionality.

FRAC2 is the auxiliary fractionality.

MOD1 is the fixed 25-bit modulus.

MOD2 is the auxiliary modulus.

RF Divider is the output divider that divides down the VCO

frequency.

fPFD = REFIN × (1/(R × (1 + T)))

(8)

where:

REFIN is the reference frequency input.

R is the reference division factor.

T is the reference divide by 2 bit (0 or 1).

For example, in a universal mobile telecommunication system

(UMTS), where a 2112.8 MHz fRFOUT is required, a 122.88 MHz

REFIN is available. The ADF4401A VCO operates in the frequency

range of 4 GHz to 8 GHz. Therefore, the RF divider of 2 must be

used (VCO frequency = 4225.6 MHz, RFOUT = VCO frequency/RF

divider = 4225.6 MHz/2 = 2112.8 MHz).

The feedback path is also important. In this example, the VCO

output is fed back before the output divider (see Figure 33).

In this example, the 122.88 MHz reference signal is divided by 2

to generate a fPFD of 61.44 MHz. The desired channel spacing

frequency is 200 kHz.

fPFD

VCO

DIVIDER

÷2

RF OUTPUT

PFD

Figure 33. Loop Closed Before Output Divider

The values used in this worked example are as follows:

N = fVCO_OUT/fPFD = 4225.6 MHz/61.44 MHz =

68.7760416666666667

(9)

where:

N is the desired value of the feedback counter, N.

fVCO_OUT is the output frequency of the VCO without using the

output divider.

fPFD is the frequency of the phase frequency detector.

INT = INT(VCO frequency/fPFD) = 68

(10)

FRAC = 0.7760416666666667

(11)

where FRAC is the fractional part of the N.

MOD1 = 33,554,432

(12)

FRAC1 = INT(MOD1 × FRAC) = 26,039,637

(13)

Remainder = 0.3333333333 or 1/3

(14)

MOD2 = fPFD/GCD(fPFD, fCHSP) =

61.44 MHz/GCD(61.44 MHz, 200 kHz) = 1536

(15)

where GCD is the greatest common divider operant.

FRAC2 = Remainder × 1536 = 512

(16)

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