ADF4401ABCEZ datasheet(7/39 Pages) AD

7 / 39 page

Data Sheet

ADF4401A

Rev. 0 | Page 7 of 39

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.

Table 3.

Parameter

Rating

AVDD Rails to GND1

−0.3 V to +3.6 V

AVDD Rails to Each Other

−0.3 V to +0.3 V

VCC_VCO to AVDD

−0.3 V to AVDD + 2.8 V

VCC_RF, VCC_IF1, VCC_IF2, and

VCC_VCO to GND1

−0.3 V to +5.5 V

VCC_MIX to AVDD

−0.3 V to VCC_MIX +

0.3 V

VCC_MIX to GND1

−0.3 V to +3.6 V

CPOUT to GND1

−0.3 V to AVDD + 0.3 V

VTUNE to GND1

−0.3 V to AVDD + 0.3 V

Digital Input and Output Voltage to

GND1

−0.3 V to AVDD + 0.3 V

Analog Input and Output Voltage to

GND1

−0.3 V to AVDD + 0.3 V

REFP and REFN to GND1

−0.3 V to AVDD + 0.3 V

REFP to REFN

±2.1 V

Temperature

Operating Range

−25°C to +85°C

Storage Range

−65°C to +125°C

Maximum Junction

125 °C

Reflow Soldering

Peak

260 °C

Time at Peak

30 sec

Transistor Count

CMOS

152000

Bipolar

8000

GND = 0 V.

Stresses at or above those listed under Absolute Maximum

Ratings may cause permanent damage to the product. This is a

stress rating only; functional operation of the product at these

or any other conditions above those indicated in the

operational section of this specification is not implied.

Operation beyond the maximum operating conditions for

extended periods may affect product reliability.

THERMAL RESISTANCE

Thermal performance is directly linked to printed circuit board

(PCB) design and operating environment. Careful attention to

PCB thermal design is required.

θJA is the natural convection, junction to ambient thermal

resistance measured in a one cubic foot sealed enclosure. θJC is

the junction to case thermal resistance.

Table 4. Thermal Resistance

Package Type

θJA

θJC

Unit

CE-80-11

27.9

12.1

°C/W

Test Condition 1: thermal impedance simulated values are based on use of a

4-layer PCB with the thermal impedance paddle soldered to a ground plane.

ELECTROSTATIC DISCHARGE (ESD) RATINGS

The following ESD information is provided for handling of

ESD-sensitive devices in an ESD protected area only.

Human body model (HBM) per ANSI/ESDA/JEDDEC JS-001.

Charged device model (CDM) per ANSI/ESDA/JEDEC JS-002.

ESD Ratings for ADF4401A

Table 5. ADF4401A, 80-Terminal LGA_CAV

ESD Model

Withstand Threshold (V)

Class

HBM

±5001

CDM

±1252

C0B

All pins except IFOUT rated at ±2500 V HBM classification test level (Class 2).

All pins except IFOUT, LO_IN, RF8P, and RF8N rated at ±500 V CDM

classification test level (Class C2A). RF8P pin and RF8N pin rated at ±250 V

CDM classification test level (Class C1).

ESD CAUTION

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