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PSD813F1 датащи(PDF) 29 Page - STMicroelectronics |
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PSD813F1 датащи(HTML) 29 Page - STMicroelectronics |
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29 / 110 page ![]() 29/110 PSD813F1 ERASING FLASH MEMORY Flash Bulk Erase The Flash Bulk Erase instruction uses six write op- erations followed by a Read operation of the status register, as described in Table 8., page 20. If any byte of the Bulk Erase instruction is wrong, the Bulk Erase instruction aborts and the device is re- set to the Read Flash memory status. During a Bulk Erase, the memory status may be checked by reading status bits DQ5, DQ6, and DQ7, as detailed in section entitled PROGRAM- MING FLASH MEMORY, page 27. The Error bit (DQ5) returns a ‘1’ if there has been an Erase Fail- ure (maximum number of erase cycles have been executed). It is not necessary to program the array with 00h because the PSD will automatically do this before erasing to 0FFh. During execution of the Bulk Erase instruction, the Flash memory will not accept any instructions. Flash Sector Erase. The Sector Erase instruc- tion uses six write operations, as described in Ta- ble 8., page 20. Additional Flash Sector Erase confirm commands and Flash sector addresses can be written subsequently to erase other Flash sectors in parallel, without further coded cycles, if the additional instruction is transmitted in a shorter time than the timeout period of about 100 µs. The input of a new Sector Erase instruction will restart the time-out period. The status of the internal timer can be monitored through the level of DQ3 (Erase time-out bit). If DQ3 is ‘0’, the Sector Erase instruction has been received and the timeout is counting. If DQ3 is ‘1’, the timeout has expired and the PSD is busy eras- ing the Flash sector(s). Before and during Erase timeout, any instruction other than Erase suspend and Erase Resume will abort the instruction and reset the device to READ mode. It is not neces- sary to program the Flash sector with 00h as the PSD will do this automatically before erasing (byte=FFh). During a Sector Erase, the memory status may be checked by reading status bits DQ5, DQ6, and DQ7, as detailed in section entitled PROGRAM- MING FLASH MEMORY, page 27. During execution of the erase instruction, the Flash block logic accepts only Reset and Erase Suspend instructions. Erasure of one Flash sector may be suspended, in order to read data from an- other Flash sector, and then resumed. Flash Erase Suspend When a Flash Sector Erase operation is in progress, the Erase Suspend instruction will sus- pend the operation by writing 0B0h to any address when an appropriate Chip Select (FSi) is true. (See Table 8., page 20). This allows reading of data from another Flash sector after the Erase op- eration has been suspended. Erase suspend is accepted only during the Flash Sector Erase in- struction execution and defaults to READ mode. An Erase Suspend instruction executed during an Erase timeout will, in addition to suspending the erase, terminate the time out. The Toggle Bit DQ6 stops toggling when the PSD internal logic is suspended. The toggle Bit status must be monitored at an address within the Flash sector being erased. The Toggle Bit will stop tog- gling between 0.1 µs and 15 µs after the Erase Suspend instruction has been executed. The PSD will then automatically be set to Read Flash Block Memory Array mode. If an Erase Suspend instruction was executed, the following rules apply: s Attempting to read from a Flash sector that was being erased will output invalid data. s Reading from a Flash sector that was not being erased is valid. s The Flash memory cannot be programmed, and will only respond to Erase Resume and Reset instructions (READ is an operation and is OK). s If a Reset instruction is received, data in the Flash sector that was being erased will be invalid. Flash Erase Resume If an Erase Suspend instruction was previously ex- ecuted, the erase operation may be resumed by this instruction. The Erase Resume instruction consists of writing 030h to any address while an appropriate Chip Select (FSi) is true. (See Table 8., page 20.) |
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