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PSD813F1 датащи(PDF) 83 Page - STMicroelectronics

номер детали PSD813F1
подробное описание детали  Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 5V
PDF  110 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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PSD813F1 датащи(HTML) 83 Page - STMicroelectronics

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PSD813F1
Table 49. CPLD Macrocell Synchronous Clock Mode Timing (5V devices)
Note: 1. Fast Slew Rate output available on PA3-PA0, PB3-PB0, and PD2-PD0. Decrement times by given amount.
2. CLKIN (PD1) tCLCL = tCH + tCL.
Symbol
Parameter
Conditions
-90
-12
-15
Fast
PT
Aloc
Turbo
Off
Slew
rate1
Unit
Min
Max
Min
Max
Min
Max
fMAX
Maximum
Frequency
External
Feedback
1/(tS+tCO)
30.3
0
26.3
23.8
MHz
Maximum
Frequency
Internal
Feedback
(fCNT)
1/(tS+tCO–10)
43.4
8
35.7
31.25
MHz
Maximum
Frequency
Pipelined Data
1/(tCH+tCL)
50.0
0
41.67
33.3
MHz
tS
Input Setup
Time
15
18
20
+ 2
+ 10
ns
tH
Input Hold Time
0
0
0
ns
tCH
Clock High
Time
Clock Input
10
12
15
ns
tCL
Clock Low Time
Clock Input
10
12
15
ns
tCO
Clock to Output
Delay
Clock Input
18
20
22
– 2ns
tARD
CPLD Array
Delay
Any macrocell
16
18
22
+ 2
ns
tMIN
Minimum Clock
Period 2
tCH+tCL
20
24
30
ns



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