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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PSD813F1 датащи(PDF) 56 Page - STMicroelectronics |
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PSD813F1 датащи(HTML) 56 Page - STMicroelectronics |
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56 / 110 page  PSD813F1 56/110 Address In Mode For microcontrollers that have more than 16 ad- dress lines, the higher addresses can be connect- ed to Port A, B, C, and D. The address input can be latched in the Input Macrocell by the address strobe (ALE/AS). Any input that is included in the DPLD equations for the PLD’s Flash, EEPROM, or SRAM is considered to be an address input. Data Port Mode Port A can be used as a data bus port for a micro- controller with a non-multiplexed address/data bus. The Data Port is connected to the data bus of the microcontroller. The general I/O functions are disabled in Port A if the port is configured as a Data Port. Peripheral I/O Mode Peripheral I/O Mode can be used to interface with external peripherals. In this mode, all of Port A serves as a tri-stateable, bi-directional data buffer for the microcontroller. Peripheral I/O Mode is en- abled by setting Bit 7 of the VM Register to a ‘1.’ Figure 28 shows how Port A acts as a bi-direction- al buffer for the microcontroller data bus if Periph- eral I/O Mode is enabled. An equation for PSEL0 and/or PSEL1 must be written in PSDabel. The buffer is tri-stated when PSEL 0 or PSEL1 is not active. Figure 28. Peripheral I/O Mode RD PSEL0 PSEL1 PSEL VM REGISTER BIT 7 WR PA0 - PA7 D0-D7 DATA BUS AI02886 |
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