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PRELIMINARY TECHNICAL DATA

AD9953

value. The upper 14-bits of the RAM drive the phase adder (bits <31:18>). Bits <17:0> of the

RAM output are unused when the RAM destination bit is set. The “No Dwell” bit is a don’t care in

Direct Switch Mode.

Ramp-Up Mode

Ramp-Up mode, in conjunction with the segmented RAM capability, allows up to four different

“sweep profiles” to be programmed into the AD9953. The AD9953 is programmed for Ramp-Up

mode by writing the RAM Enable bit true and programming the RAM Mode Control bits of each

profile to be used to logic 001(b). As in all modes that enable the memory, the RAM destination

bit controls whether the RAM output drives the phase accumulator or the phase offset adder.

Upon starting a sweep (via an I/O UPDATE or change in Profile bits), the RAM address generator

loads the RAM Segment Beginning Address bits of the current RSCW, driving the RAM output

from this address and the Ramp Rate Timer loads the RAM Segment Address Ramp Rate bits.

When the ramp rate timer finishes a cycle, the RAM address generator increments to the next

address, the timer reloads the ramp rate bits and begins a new countdown cycle. This sequence

continues until the RAM address generator has incremented to an address equal to the RAM

Segment Final Address bits of the current RSCW.

If the “No Dwell” bit is clear, when the RAM address generator equals the final address, the

generator stops incrementing as the terminal frequency has been reached. The sweep is complete

and does not re-start until an I/O UPDATE or change in Profile is detected to enable another sweep

from the beginning to the final RAM address as described above.

If the “No Dwell” bit is set, when the RAM address generator equals the final address, after the

next ramp rate timer cycle the phase accumulator is cleared. The phase accumulator remains

cleared until another sweep is initiated via an I/O UPDATE input or change in profile.

Notes to the Ramp-Up mode:

1) The user must insure that the beginning address is lower than the final address.

2) Changing profiles automatically terminates the current sweep and starts the next sweep.

3) The AD9953 offers no output signal indicating when a terminal frequency has been reached.

Setting the RAM destination bit true such that the RAM output drives the phase-offset adder

is valid. While the above discussion describes a frequency sweep, a phase sweep operation

is also available.

Another application for Ramp-Up mode is non-symmetrical FSK modulation. With the RAM

configured for two segments, using the Profile<0> bit as the data input allows non-symmetrical

ramped FSK.

Bi-directional Ramp Mode

REV. PrB 1/30/03

Page 25

Analog Devices, Inc.

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