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PRELIMINARY TECHNICAL DATA

AD9953

CFR2<9>: Crystal Out Enable bit.

When CFR2<9> = 0 (default) the Crystal Out pin is inactive.

When CFR2<9> = 1, the Crystal Out pin is active. When active, the crystal oscillator

circuitry output drives the Crystal Out pin, which can be connected to other devices

to produce a reference frequency.

CFR2<8>: DAC prime data disable bit.

When CFR2<8> = 0 (default), the DAC prime data is enabled for operation.

When CFR2<8> = 1, the DAC prime data is not generated and these outputs remain

logic zeros.

CFR2<7:3>: Reference clock multiplier control bits. See the Phase Locked Loop (PLL)

section of this document for details.

CFR2<2>: VCO gain control bit. This bit is used to control the gain setting on the VCO.

CFR<1:0>: Charge Pump gain control bits. These bits are used to control the gain setting

on the charge pump.

Other Register Descriptions

Amplitude Scale Factor (ASF)

The ASF Register stores the 2-bit Auto Ramp Rate Speed value ASF<15:14> and the 14-bit

Amplitude Scale Factor ASF<13:0> used in the Output Shaped Keying (OSK) operation. In auto

OSK operation, that is CFR1<24> = 1, ASF <15:14> tells the OSK block how many amplitude

steps to take for each increment or decrement. ASF<13:0> sets the maximum value achievable by

the OSK internal multiplier. In manual OSK mode, that is CFR1<24>=0, ASF<15:14> have no

affect. ASF <13:0> provide the output scale factor directly. If the OSK enable bit is cleared,

CFR1<25>=0, this register has no affect on device operation.

Amplitude Ramp Rate (ARR)

The ARR register stores the 8-bit Amplitude Ramp Rate used in the Auto OSK mode, that is

CFR1<25>=1, CFR<24>=1. This register programs the rate the amplitude scale factor counter

increments or decrements. In the OSK is set to manual mode, CFR1<25>=1 CFR<24>=0, or if

OSK enable is cleared CFR1<25>=0, this register has no affect on device operation.

REV. PrB 1/30/03

Page 22

Analog Devices, Inc.

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