PC87372 datasheet(60/144 Pages) NSC

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3.0 Device Architecture and Configuration (Continued)

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Revision 1.2

3.14 FAN SPEED MONITOR (FSM) CONFIGURATION

3.14.1 General Description

This module includes two Fan Speed Monitor units (see Section 7 on page 95). The 10 runtime registers of the two functional

blocks are arranged in the address space shown in Table 24. The base address is 32-byte aligned. Address bits 0

−4 are

used to indicate the register offset.

3.14.2 Logical Device 9 (FSM) Configuration

Table 25 lists the configuration registers that affect the Fan Speed Monitor. Only the last register (F0h) is described here.

See Section 3.2.3 on page 32 for a detailed description of the other registers.

Table 24. Runtime Registers in FSM Address Space

Offset

Mnemonic

Function

00h

FMTHRL1 Fan Monitor 1 Threshold Low

Fan Speed Monitor 1

01h

FMTHRH1 Fan Monitor 1 Threshold High

02h

FMSPRL1 Fan Monitor 1 Speed Low

03h

FMSPRH1 Fan Monitor 1 Speed High

04h

FMCSR1

Fan Monitor 1 Control & Status

05h

FMTHRL2 Fan Monitor 2 Threshold Low

Fan Speed Monitor 2

06h

FMTHRH2 Fan Monitor 2 Threshold High

07h

FMSPRL2 Fan Monitor 2 Speed Low

08h

FMSPRH2 Fan Monitor 2 Speed High

09h

FMCSR2

Fan Monitor 2 Control & Status

0Ah-1Fh Reserved

Table 25. FSM Conﬁguration Registers

Index

Conﬁguration Register or Action

Type

Power Well

Reset

30h

Activate. When bit 0 is cleared, the runtime registers of this logical device are

not accessible (see Section 3.3.1 on page 36).1

1. The logical device runtime registers are maintained and all detection mechanisms are functional.

R/W

VDD3

00h

60h

FSM Base Address MSB register

R/W

VDD3

00h

61h

FSM Base Address LSB register. Bits 4-0 (for A4-0) are read only, ‘00000’.

R/W

VDD3

00h

70h

Interrupt Number and Wake-Up on IRQ Enable register

R/W

VDD3

00h

71h

Interrupt Type. Bit 1 is read/write. Other bits are read only.

R/W

VDD3

03h

74h

Report no DMA assignment

VDD3

04h

75h

Report no DMA assignment

VDD3

04h

F0h

Fan Speed Monitor Conﬁguration register (FSMCF)

R/W

VDD3

00h

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