| поискавой системы для электроныых деталей |
|
PC87372 датащи(PDF) 31 Page - National Semiconductor (TI) |
|
|
|
|||||||||||||||||||||||||||||
PC87372 датащи(HTML) 31 Page - National Semiconductor (TI) |
|
31 / 144 page ![]() 3.0 Device Architecture and Configuration (Continued) 31 www.national.com Revision 1.2 3.2.2 Banked Logical Device Registers Structure Each functional block is associated with a Logical Device Number (LDN). The configuration registers are grouped into banks, where each bank holds the standard configuration registers of the corresponding logical device. Table 8 shows the LDN val- ues of the PC87372 functional blocks. Any value not listed is reserved. Figure 5 shows the structure of the standard configuration register file. The LDN and PC87372 configuration registers are not banked and are accessed by the Index-Data register pair only, as described above. However, the device control and device configuration registers are duplicated over eight banks, corresponding to the eight logical devices. Therefore, access- ing a specific register in a specific bank is performed by two-dimensional indexing, where the LDN register selects the bank (or logical device) and the Index register selects the register within the bank. Accessing the Data register while the Index register holds a value of 30h or higher actually accesses the configuration registers of the logical device selected by the LDN register and pointed to by the Index register. Figure 5. Structure of Standard Configuration Register File Write accesses to unimplemented registers (i.e., accessing the Data register while the Index register points to a non-existing register) are ignored. Read accesses return 00h on all addresses, except for 74h and 75h (DMA configuration registers), which returns 04h (indicating no DMA channel). The configuration registers are accessible immediately after reset. Table 8. Logical Device Number (LDN) Assignments LDN Functional Block 00h Floppy Disk Controller (FDC) 01h Parallel Port (PP) 03h Serial Port (SP) 04h System Wake-Up Control (SWC) 05h Keyboard and Mouse Controller (KBC) - Mouse Interface 06h Keyboard and Mouse Controller (KBC) - Keyboard Interface 07h General-Purpose I/O (GPIO) Ports 09h Fan Speed Monitor (FSM) 07h 20h 30h 60h 75h FFh Logical Device Number Register SuperI/O Configuration Registers Logical Device Control Register Standard Logical Device Special (Vendor-Defined) Configuration Registers Banks 2Fh F0h Bank Select 63h 74h 70h 71h Configuration Registers (One per Logical Device) Logical Device |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |