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PC87372 датащи(PDF) 40 Page - National Semiconductor (TI) |
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PC87372 датащи(HTML) 40 Page - National Semiconductor (TI) |
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40 / 144 page ![]() 3.0 Device Architecture and Configuration (Continued) 40 www.national.com Revision 1.2 3.7.2 SuperI/O Configuration 1 Register (SIOCF1) Power Well: VDD3 Location: Index 21h Type: Varies per bit Bit 76 5 43210 Name LOCKMCF LOCKGCF Reserved (must be ‘01’) IOWAIT SWRST GLOBEN Reset 0 0 0 10001 Bit Type Description 7 R/W1S LOCKMCF (Lock Multiplexing Configuration). When set to 1, this bit locks the configuration of registers SIOCF1 and SIOCF2 by disabling writing to all bits in these registers (including the LOCKMCF bit itself), except for the LOCKGCF, SWRST and GLOBEN bits in SIOCF1. Once set, this bit can be cleared by VDD3 Power-Up reset (or Hardware reset). 0: R/W bits are enabled for write (default) 1: All bits are RO 6 R/W1S LOCKGCF (Lock GPIO Pins Configuration). When set to 1, this bit locks the configuration registers of all GPIO pins (see Section 3.13.2 on page 56) by disabling writes to all their bits (including the LOCKGCF bit itself). The locked registers include the GPCFG1 (except LOCKCFP bit), GPEVR, GPCFG2 and GPMODE registers of all GPIO pins. Once set, this bit can be cleared by VDD3 Power- Up reset (or Hardware reset). 0: R/W bits are enabled for write (default) 1: All bits are RO 5-4 − Reserved. These bits must be ‘01’. 3-2 R/W or RO IOWAIT (Number of I/O Wait States). These bits set the number of wait states for I/O transactions through the LPC bus. Bits 3 2 Number of Wait States 0 0: 0 (default) 0 1: 2 1 0: 6 1 1: 12 1 R/W SWRST (Software Reset). When set to 1, this bit triggers the Software reset sequence (see Section 2.2.4 on page 27), after which it returns to 0. Read always returns 0. This bit is not influenced by the value of LOCKMCF. 0: Inactive (default) 1: Trigger the Software reset sequence 0 R/W or RO GLOBEN (Global Device Enable). This bit makes it possible to disable all logical devices by setting a single bit (to 0). In addition, when the bit is set to 1, it enables the operation of all the logical devices of the PC87372, as long as the logical device is itself enabled (see Table 8 on page 31). The behavior of the different devices is explained in Section 3.3 on page 36. 0: All logical devices in the PC87372 device are forced to be disabled and their resources are released. 1: Enables each PC87372 logical device that is itself enabled (default); see Section 3.3.1 on page 36. |
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