WM8912 datasheet(25/129 Pages) CIRRUS

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Production Data

WM8912

PD, Rev 4.1, February 2013

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

11:8

DRC_DCY [3:0]

0010

Gain decay rate (seconds/6dB)

0000 = 186ms

0001 = 372ms

0010 = 743ms (default)

0011 = 1.49s

0100 = 2.97s

0101 = 5.94s

0110 = 11.89s

0111 = 23.78s

1000 = 47.56s

1001-1111 = Reserved

Table 4 DRC Attack and Decay Rates

Note:

For detailed information about DRC attack and decay rates, please see Wolfson application note

WAN0247.

ANTI-CLIP CONTROL

The DRC includes an Anti-Clip feature to avoid signal clipping when the input amplitude rises very

quickly. This feature uses a feed-forward technique for early detection of a rising signal level. Signal

clipping is avoided by dynamically increasing the gain attack rate when required. The Anti-Clip feature

is enabled using the DRC_ANTICLIP bit.

Note that the feed-forward processing increases the latency in the input signal path. For low-latency

applications (e.g. telephony), it may be desirable to reduce the delay, although this will also reduce

the effectiveness of the anti-clip feature. The latency is determined by the DRC_FF_DELAY bit. If

necessary, the latency can be minimised by disabling the anti-clip feature altogether.

The DRC Anti-Clip control bits are described in Table 5.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R40 (28h)

DRC Control 0

DRC_FF_DELAY

Feed-forward delay for anti-clip

feature

0 = 5 samples

1 = 9 samples

Time delay can be calculated as 5/fs

or 9/ fs, where fs is the sample rate.

DRC_ANTICLIP

Anti-clip enable

0 = disabled

1 = enabled

Table 5 DRC Anti-Clip Control

Note that the Anti-Clip feature operates entirely in the digital domain. It cannot be used to prevent

signal clipping in the analogue domain nor in the source signal. Analogue clipping can only be

prevented by reducing the analogue signal gain or by adjusting the source signal.

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