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WM8912 датащи(PDF) 90 Page - Cirrus Logic |
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WM8912 датащи(HTML) 90 Page - Cirrus Logic |
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90 / 129 page ![]() WM8912 Production Data w PD, Rev 4.1, February 2013 90 POWER-ON RESET The WM8912 includes an internal Power-On-Reset (POR) circuit, which is used to reset the digital logic into a default state after power up. The POR circuit is powered from AVDD and monitors DCVDD. The internal POR ¯¯¯ signal is asserted low when AVDD and DCVDD are below minimum thresholds. The specific behaviour of the circuit will vary, depending on the relative timing of the supply voltages. Typical scenarios are illustrated in Figure 54 and Figure 55. DCVDD Vpord_on 0V AVDD 0V Vpora Vpora_off LO HI Internal POR Device ready POR active POR active POR undefined Figure 54 Power On Reset Timing - AVDD Enabled First DCVDD 0V AVDD 0V Vpora Vpord_off LO HI Internal POR Device ready Vpora_on POR active POR active POR undefined Figure 55 Power On Reset Timing - DCVDD Enabled First |
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