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WM8912 датащи(PDF) 76 Page - Cirrus Logic

номер детали WM8912
подробное описание детали  Ultra Low Power DAC with Headphone Driver
PDF  129 Pages
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производитель  CIRRUS [Cirrus Logic]
домашняя страница  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8912 датащи(HTML) 76 Page - Cirrus Logic

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WM8912
Production Data
w
PD, Rev 4.1, February 2013
76
GENERAL PURPOSE INPUT/OUTPUT (GPIO)
The WM8912 provides two multi-function pins which can be configured to provide a number of
different functions. These are digital input/output pins on the DBVDD power domain. The GPIO pins
are:
IRQ/GPIO1
BCLK/GPIO4
Each general purpose I/O pin can be configured to be a GPIO input or configured as one of a number
of output functions. Signal de-bouncing can be selected on GPIO input pins for use with jack/button
detect applications. Table 51 lists the functions that are available on each of the GPIO pins.
GPIO PIN FUNCTION
GPIO PINS
IRQ / GPIO1
BCLK / GPIO4
GPIO input
(including jack/button detect)
Yes
Yes
GPIO output
Yes
Yes
BCLK
No
Yes
Interrupt (IRQ)
Yes
Yes
FLL Lock output
Yes
Yes
FLL Clock output
Yes
Yes
Table 51 GPIO Functions
IRQ/GPIO1
The IRQ/GPIO1 pin is configured using the register bits described in Table 52. By default, this pin is
IRQ output with pull-down resistor enabled.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R121 (79h)
GPIO
Control 1
5
GPIO1_PU
0
GPIO1 pull-up resistor enable
0 = pull-up disabled
1 = pull-up enabled
4
GPIO1_PD
1
GPIO1 pull-down resistor enable
0 = pull-down disabled
1 = pull-down enabled
3:0
GPIO1_SEL [3:0]
0100
GPIO1 Function Select
0000 = GPIO input
0001 = Clock output
(f=SYSCLK/OPCLKDIV)
0010 = Logic '0' output
0011 = Logic '1' output
0100 = IRQ output (default)
0101 = FLL Lock output
0110 = Reserved
0111 = Reserved
1000 = Reserved
1001 = FLL Clock output
1010 to 1111 = Reserved
Table 52 IRQ/GPIO1 Control



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