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PC97307 датащи(PDF) 213 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
номер детали PC97307
подробное описание детали  PC87307/PC97307 Plug and Play Compatible and PC97 Compliant SuperI/O
PDF  218 Pages
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC97307 датащи(HTML) 213 Page - National Semiconductor (TI)

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Glossary
www.national.com
11-bit address mode
In this mode, the part decodes address lines A0-
A10, A11-A15 are masked to 1, and UART2 is a
fully featured 16550 UART. The mode is configured
during reset, via CFG0 strap pin.
16-bit address mode
In this mode, the part decodes address lines A0-
A15
and
UART2
is
a
16550
UART
with
SIN2/SOUT2 interface signals only. The mode is
configured during reset, via CFG0 strap pin.
ABGDH and ABGDL
Alternate Baud rate Generator Divisor register
(High and Low bytes) for UART2. (Logical device 5,
bank 2, offsets 01h and 00h, respectively.)
ADDR
Address Register of the parallel port in EPP
modes. (Logical device 4, offset 03h.)
AFIFO
Address FIFO for the parallel port in Extended Ca-
pabilities Port (ECP) mode 011. (Logical device 4,
offset 000h.)
APC
Advanced Power Control.
APCR1 and APCR2
APC control registers 1 and 2. (Logical device 2,
offsets 40h and 41h, respectively.)
APSR
Advanced Power Control (APC) status register.
(Logical device 2, offset 42h.)
ASCR
Auxiliary Status and Control Register for UART2 in
Extended operation modes. (Logical device 5, bank
0, offset 07h.)
ASK-IR
Amplitude Shift Keying Infrared.
BGDH and BGDL
Baud rate Generator Divisor buffer (High and Low
bytes) for UART2. (Logical devices 5, bank 1, off-
sets 01h and 00h, respectively.)
BSR
Bank Selection Register for UART2, when enabled,
i.e., when bit 7 of this register is 1. (Logical device
5, all banks, offset 03h.)
CCR
Configuration Control Register of the Floppy Disk
Controller (FDC) for write operations. (Logical de-
vice 3, offset 07h.)
CFIFO
Parallel port data FIFO in Extended Capabilities
Port (ECP) mode 010. (Logical device 4, offset
400h.)
CNFGA and CNFGB
Configuration registers A and B for the parallel port
in Extended Capabilities Port (ECP) mode 111.
(Logical device 4, offsets 400h and 401h, respec-
tively.)
Confg0
See PP Confg0.
Consumer Remote Control Mode
This UART mode supports all four protocols cur-
rently used in remote-controlled home entertain-
ment equipment. Also called TV-Remote mode.
Control0, Control2 and Control4
Internal configuration registers of the parallel port in
Extended Capabilities Port (ECP) modes. (Logical
device 4, second level offsets 00h, 02h and 04h.)
CSN
Card Select Number register - an 8-bit register with
a unique value that identifies an ISA card.
CRA, CRB, CRC, CRD
Control Registers of the Real-Time Clock (RTC).
(Logical device 2, offsets 0Ah, 0Bh, 0Ch and 0Dh,
respectively.)
CTR
Control Register of the parallel port in SPP modes.
(Logical device 4, offset 02h.)
DASK-IR
Digital Amplitude Shift Keying Infrared.
Data
The Data register contains the data in the register
indicated by the corresponding Index register.
DATA0, DATA1, DATA2 and DATA3
Data Registers of the parallel port in EPP modes.
(Logical device 4, offsets 04h, 05h, 06h and 07h,
respectively.)
DATAR
Data Register for the parallel port in Extended Ca-
pability Port (ECP) modes 000 and 001. (Logical
device 4, offset 000h.)
DCR
Data Control Register for the parallel port in Ex-
tended Capabilities Port (ECP) modes. (Logical de-
vice 4, offset 002h.)
Device
Any circuit that performs a specific function, such
as a parallel port.
DFIFO
ECP Data FIFO in Extended Capabilities Port
(ECP) mode 011. (Logical device 4, offset 400h.)
DID
Device ID register for UART2. (Logical device 5,
bank 3, offset 00h.)
DIR
Digital Input Register of the Floppy Disk Controller
(FDC) for read operations. (Logical device 3, offset
07h.)
DOR
Digital Output Register of the Floppy Disk Control-
ler (FDC). (Logical device 3, offset 2h.)
Glossary



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