PC97307 datasheet(170/218 Pages) NSC

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General Purpose Input and Output (GPIO) Ports (Logical Device 7) and Chip Select Output Signals

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8.0

General Purpose Input and Output

(GPIO) Ports (Logical Device 7) and

Chip Select Output Signals

8.1

GENERAL PURPOSE INPUT AND OUTPUT

(GPIO) PORTS

The part supports two identical General Purpose I/O (GPIO)

ports.

Activation and deactivation (enable/disable) of GPIO ports

is controlled by the Activate register (index 30h) of logical

device 7 and by bit 7 of the Function Enable Register 2

(FER2) of the Power Management logical device. See Sec-

tion 9.2.4 on page 173.

The base address of the GPIO ports is software configurable.

It is controlled by two base address registers at indexes 60h

and 61h1 of logical device 7. See Table 2-19 on page 33.

The registers that control the GPIO ports are in two banks.

The active bank is selected by the GPIO Bank Select bit, bit

7 of SuperI/O Configuration 2 register. See section 2.4.4 on

page 35.

Five registers control GPIO Port 1 and four registers control

GPIO Port 2. The registers that control Port 1 are at offsets

00h through 03h from the base address in bank 0 and at off-

set 00h in bank 1. The registers that control Port 2 are at off-

sets 04h through 07h from the base address in bank 0. See

Tables 8-1 and 8-2.

• Port Data registers at offsets 00h and 04h read or write

the data bits of Ports 1 and 2, respectively.

• Port Direction registers at offsets 01h and 05h control

the direction of each bit of Ports 1 and 2, respectively.

• Port Output Type registers at offsets 02h and 06h con-

trol the buffer type (open-drain or push-pull) of each bit

of Ports 1 and 2, respectively.

• The GPIO ports have open-drain output signals with in-

ternal pull-ups and TTL input signals. Pull-up Control

registers at offsets 03h and 07h enable or disable the in-

ternal pull-up capability of each bit of Ports 1 and 2, re-

spectively.

Note that GPIO21 on pin 77 is unaffected by the output type or

direction registers - it is always push-pull with no internal pullup.

The output type and pull-up settings for the GPIO17,16 sig-

nals can be locked by setting bits 7,6 of the Port 1 Lock reg-

ister in bank 1.

Reading an output pin returns the internally latched bit val-

ue, not the pin value.

Writing to an input pin has no effect on the pin, except for

internally latching the written value. The latched value is re-

flected on the pin when the direction changes to output.

Upon reset the write latches are initialized to FFh.

The port pins are back-drive protected when the part is pow-

ered down and also when the port is inactive (disabled). AC

and DC are the same as the STB pin, except for IOH/IOL of

4 mA.

The GPIO signals are multiplexed as follows:

• GPIO27-24 are multiplexed with the X-Bus Data Buffer

(XDB) signals XD5-2, respectively.

• GPIO23 is multiplexed with RING.

• GPIO22 is multiplexed with POR.

• GPIO21 is multiplexed with IRSL0 and IRSL2.

• GPIO20 is multiplexed with IRSL1.

• GPIO17 is multiplexed with WDO

A GPIO port must not be enabled at the same address as

another accessible PC87307/PC97307 register. Undefined

results will occur if a GPIO is configured in this way.

TABLE 8-1. The GPIO Registers, Bank 0

GPIO Register

Offset

Type

Hard Reset

Value

Detailed Description

Port 1 Data

00h

R/W

FFh

Reads return the bit or pin value, according to the direction bit.

Writes are saved in this register and affect the output pins.

Port 1 Direction

01h

R/W

00h

Each bit controls the direction of the corresponding port pin.

0 - Input. Reads of Port Data register return pin value.

1 - Output. Reads of Port Data register return bit value.

Port 1 Output Type

02h

R/W

00h

Each bit controls the type of the corresponding port pin.

0 - Open-drain.

1 - Push-pull.

Port 1 Pull-up

Control

03h

R/W

FFh

Each bit controls the internal pull-up for the corresponding port pin.

0 - No internal pull-up.

1 - Internal pull-up.

Port 2 Data

04h

R/W

FFh

Same as Port 1 Data register.

Port 2 Direction

05h

R/W

00h

Same as Port 1 Direction register.

Port 2 Output Type

06h

R/W

00h

Same as Port 1 Output Type register.

Port 2 Pull-up

Control

07h

R/W

FFh

Same as Port 1 Pull-up Control register.

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