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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ADE9078ACPZ датащи(PDF) 93 Page - Analog Devices |
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ADE9078ACPZ датащи(HTML) 93 Page - Analog Devices |
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93 / 108 page  ADE9078 Data Sheet Rev. 0 | Page 92 of 107 Addr. Name Bits Bit Name Settings Description Reset Access 18 SEQERR This bit is set to indicate a phase sequence error on the Phase Voltage zero crossings. 0x0 R/W1 17 RESERVED Reserved. 0x0 R 16 RSTDONE This bit is set to indicate that the IC has finished its power-up sequence after a reset or after changing between PSM2 or PSM3 operating mode to PSM0 or PSM1. This indicates that the user can configure the IC via the SPI port. 0x0 R/W1 15 ZXIC When this bit is set to 1, it indicates a zero crossing has been detected on Phase C current. 0x0 R/W1 14 ZXIB When this bit is set to 1, it indicates a zero crossing has been detected on Phase B current. 0x0 R/W1 13 ZXIA When this bit is set to 1, it indicates a zero crossing has been detected on Phase A current. 0x0 R/W1 12 ZXCOMB When this bit is set, it indicates a zero crossing has been detected on the combined signal from VA, VB, and VC. 0x0 R/W1 11 ZXVC When this bit is set, it indicates a zero crossing has been detected on the Phase C voltage channel. 0x0 R/W1 10 ZXVB When this bit is set, it indicates a zero crossing has been detected on the Phase B voltage channel. 0x0 R/W1 9 ZXVA When this bit is set, it indicates a zero crossing has been detected on the Phase A voltage channel. 0x0 R/W1 8 ZXTOVC This bit is set to indicate a zero crossing timeout on Phase C. This means that a zero crossing on the Phase C voltage is missing. 0x0 R/W1 7 ZXTOVB This bit is set to indicate a zero crossing timeout on Phase B. This means that a zero crossing on the Phase B voltage is missing. 0x0 R/W1 6 ZXTOVA This bit is set to indicate a zero crossing timeout on Phase A. This means that a zero crossing on the Phase A voltage is missing. 0x0 R/W1 5 RESERVED Reserved. 0x0 R 4 RFNOLOAD This bit is set when one or more phase fundamental reactive energy enters or exits the no load condition. The phase is indicated in the PHNOLOAD register. 0x0 R/W1 3 RESERVED Reserved. 0x0 R 2 VANLOAD This bit is set when one or more phase total apparent energy enters or exits the no load condition. The phase is indicated in the PHNOLOAD register. 0x0 R/W1 1 RNLOAD This bit is set when one or more phase total reactive energy enters or exits the no load condition. The phase is indicated in the PHNOLOAD register. 0x0 R/W1 0 ANLOAD This bit is set when one or more phase total active energy enters or exits the no load condition. The phase is indicated in the PHNOLOAD register. 0x0 R/W1 |
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