ADE9078ACPZ datasheet(43/108 Pages) AD

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ADE9078

Data Sheet

Rev. 0 | Page 42 of 107

Energy Accumulation Details

Internal Energy Register Overflow Rate

There are 42-bit internal signed energy accumulators for each

phase of each energy accumulation, as shown in Figure 61. These

accumulators update at a rate of fDSP = 4 kSPS. To calculate the

time until the internal accumulator overflows with full-scale

inputs and all digital gain and offset factors at zero, use the

following equation.

Maximum Internal Energy Accumulator Time (sec) =













DSP

SCALE

FULL

AWATT

241

where AWATT_AT_FULL_SCALE refers to the nominal

AWATT value with full-scale inputs.

For example, with MTEN = 0, for single-point gain compensation

and AIGAIN, AVGAIN, APGAIN, and AWATTOS all equal to

zero, the Phase A total active energy has a digital gain of 1.

Thus, the Phase A total active energy accumulated in the

internal accumulator overflows in 26.4 sec with the nominal

full-scale AWATT value of 20,823,646.

Maximum Internal Energy Accumulator Time (sec) =

sec

4000

20,823,646

241













User Energy Register Update Rate, EGYRDY

As shown in Figure 61, the internal energy accumulator is

latched into a user accessible energy register or added to a user

accessible register at a rate of EGYRDY. Figure 63 further shows

how the EGYRDY update rate is generated.

The EGYRDY update rate occurs after EGY_TIME + 1 fDSP samples

or EGY_TIME + 1 half line cycles, according to the EGY_TMR_

MODE bit in the EP_CFG register.

If EGY_TMR_MODE = 0, select the sample-based

accumulation as follows:

Internal Energy Accumulator Time (sec) =













DSP

TIME

EGY

The EGY_TIME[12:0] register allows up to (8191 + 1) =

8192 samples to be accumulated, which corresponds to

8192/4000 = 2.048 sec if EGY_TMR_MODE = 0.

Internal Energy Accumulator Time (sec) =

sec

048

4000

8191













If EGY_TMR_MODE = 1, select the half line cycle-based

accumulation as follows:

Internal Energy Accumulator Time (sec) =













RATE

TIME

EGY

With a 50 Hz line frequency and a zero-crossing interrupt rate

of 100 Hz, the maximum accumulation time is 81.92 sec with

EGY_TIME equal to 0x1FFF (8191d).

Internal Energy Accumulator Time (sec) =

100

8191













If EGY_TMR_MODE = 1, the zero-crossing source to monitor

is selected in the ZX_SEL bits in the ZX_LP_SEL register, as

shown in Figure 63.

Note that the internal energy register overflows in 26.4 sec with

full-scale inputs so EGY_TIME must be set lower than 2640d to

prevent overflow when EGY_TMR_MODE = 1.

ENERGY

POWER

ZX_SEL

ZXVA

ZXVB

ZXVC

ZXCOMB

CF3_CFG

CF3 0

EGY_TMR_MODE

CF3/ZXPIN

COUNTER

EGY_TIME[12:0] + 1

EQUAL?

EGYRDY UPDATERATE

EGYRDY

COUNTER

PWR_TIME[12:0] + 1

EQUAL?

PWRRDY UPDATE RATE

PWRRDY

fDSP

Figure 63. EGYRDY and PWRRDY Update Rates

Reloading or Accumulating User Energy Register

When an EGYRDY event happens, the internal energy

accumulation is either directly loaded into the xWATTHR

state of the EGY_LD_ACCUM bit in the EP_CFG register.

If EGY_LD_ACCUM = 0, the internal energy register is added

to the user accessible energy register. If EGY_LD_ACCUM = 1,

the internal energy register overwrites the user accessible

energy register.

Finally, the internal energy accumulator resets and starts

counting again from zero.

User Energy Register Overflow Rate

There are 45-bit user accessible signed energy accumulators for

each phase of each energy accumulation. These accumulators

update at a rate according to EGYRDY, as described in the User

Energy Register Update Rate, EGYRDY section. The following

equation shows how to calculate the time until the user

accessible accumulator overflows with full-scale inputs and all

digital gain and offset factors at zero. For this example, assume

that the energy register is updating at every fDSP = 4 kSPS sample.

Maximum User Energy Accumulator Time (sec) =













DSP

SCALE

FULL

AWATT

244

where AWATT_AT_FULL_SCALE refers to the nominal

AWATT value with full-scale inputs.

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