DM9102AT datasheet(52/77 Pages) ETC

52 / 77 page

DM9102A

Single Chip Fast Ethernet NIC controller

Final

Version: DM9102A-DS-F03

August 28, 2000

OWN

Status

Control bits

Buffer Address

Next Descriptor Address

TDES0

TDES1

TDES2

TDES3

Buffer Length

OWN

Transmit Descriptor Format

TDES0: Owner Bit with Transmit Status

OWN

Bit 31: OWN,

1=owned by DM9102A, 0=owned by host, this bit should be

set when the transmitting buffer is filled with data and ready

to be transmitted. It will be reset by DM9102A after

transmitting the whole data buffer.

LOC

FUE

This word wide content includes status of transmitted frame.

They are loaded after the data buffer that belongs to the

corresponding descriptor is transmitted.

Bit 15: ES, Error Summary

It is set for the following error conditions:

Transmit Jabber Time-out (TXJT=1), Loss of Carrier

(LOC=1), No Carrier (NC=1), Late Collision (LC=1),

Excessive Collision (EC=1), FIFO Underrun Error (FUE=1).

Bit 14: TXJT, Transmit Jabber Time Out

It is set to indicate the transmitted frame is truncated due to

transmit jabber time out condition. The transmit jabber time

out interrupt CR5<3> is set.

Bit 11: LOC, Loss of Carrier

It is set to indicate the loss of carrier during the frame

transmission. It is not valid in internal loopback mode.

Bit 10: NC, No Carrier

It is set to indicate that no carrier signal from transceiver is

found. It is not valid in internal loopback mode.

Bit 9: LC, Late Collision

It is set to indicate a collision occurs after the collision

window of 64 bytes. Not valid if FUE is set.

Bit 8: EC, Excessive collision

It is set to indicate the transmission is aborted due to 16

excessive collisions.

Bit 7: Reserved

This bit is 0 when read.

Bits 6-3: CC, Collision Count

These bits show the number of collision before

transmission. Not valid if excessive collision bit is also set.

Bit 2: Reserved

This bit is 0 when read.

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