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DM9102AT датащи(PDF) 23 Page - List of Unclassifed Manufacturers |
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DM9102AT датащи(HTML) 23 Page - List of Unclassifed Manufacturers |
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23 / 77 page ![]() DM9102A Single Chip Fast Ethernet NIC controller Final 23 Version: DM9102A-DS-F03 August 28, 2000 Power Management Register (xxxxxx50h~PCIPMR) 31 16 15 0 87 Power Management Capabilities Next Item Pointer Capability Identifier P M C Next Item Pointer Capability ID Bit Default Type Description 31:27 11000 RO PME_Support These five bits field indicate the power states in which the function may assert PME#. A value of 0 for any bit indicates that the function is not capable of asserting the PME# signal while in that power state. bit27 Æ PME# support D0 bit28 Æ PME# support D1 bit29 Æ PME# support D2 bit30 Æ PME# support D3(hot) bit31 Æ PME# support D3(cold) DM9102A’s bit31~27=11000 indicates PME# can be asserted fromD3(hot) & D3(cold). 26:22 00000 RO Reserved (DM9102A not supports D1, D2) 21 1 RO A “1” indicates that the function requires a device specific initialization sequence following transition to the D0 uninitialized state. 20 1 RO Auxiliary Power Source This bit is only meaningful if bit31 is a “1”. This bit is “1” in DM9102A indicates that support for PME# in D3(cold) requires auxiliary power. 19 0 RO PME# Clock “0” indicates that no PCI clock is required for the function to generate PME#. 18:16 001 RO Version A value of 001 indicates that this function complies with the Revision 1.0 of the PCI Power Management Interface Specification. A value of 010 is for DM9102A/A that complies with the revision 1.1 of the PCI Power Management Interface Specification. 15:8 00h RO Next Item Pointer The offset into the function’s PCI Configuration Space pointing to the location of next item in the function’s capability list is “00h” 7:0 01h RO Capability Identifier When “01h” indicates the linked list item as being the PCI Power Management Registers. |
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